This paper is based on a previous work of the first author [16] in which a mathematical model of the computer has been presented. The model deals with random access memory, such as RASP of C. C. Elgot and A. Robinson [14], however, it allows for a more realistic modeling of real computers. This new model of computers has been named by the author (Y. Nakamura, [16]) Architecture Model for Instructions (AMI). It is more developed than previous models, both in the description of hardware (e.g., the concept of the program counter, the structure of memory) as well as in the description of instructions (instruction codes, addresses). The structure of AMI over an arbitrary collection of mathematical domains N consists of: - a non-empty set of obje...
Micro-architecture designs and methods are provided. A computer processing architecture may include ...
Since the 60's the architectural model used by processors is the 'Von Neumann' model in which a proc...
Processor performance is directly impacted by the latency of the memory system. As processor core cy...
This paper has arisen from an attempt to determine the nature of computer instructions from a viewpo...
AbstractJust as there is a theory of groups, or rings, or fields, or topological spaces, so there is...
Formal models for a computer and for programs are introduced. These models are used to develop a the...
This paper presents an algebraic theory of instruction sequences with instructions for a random acce...
This paper presents an algebraic theory of instruction sequences with instructions for Turing tapes ...
Graduation date: 1990This thesis describes the design of a Reduced Instruction Set Computer.\ud Its ...
International audienceModeling the execution of a processor and its instructions is a challenging pr...
In this paper we present a model of computer architecture. The proposed model uses a triplet to desc...
International audience—This paper presents the computing model for In-Memory Computing architecture ...
From the earliest days of computers until the early 1970s, the trend in computer architecture was to...
The modern computer systems that are in use nowadays are mostly processor-dominant, which means that...
Computers with the Von-Neumann architecture improve their processing power with the support of memo...
Micro-architecture designs and methods are provided. A computer processing architecture may include ...
Since the 60's the architectural model used by processors is the 'Von Neumann' model in which a proc...
Processor performance is directly impacted by the latency of the memory system. As processor core cy...
This paper has arisen from an attempt to determine the nature of computer instructions from a viewpo...
AbstractJust as there is a theory of groups, or rings, or fields, or topological spaces, so there is...
Formal models for a computer and for programs are introduced. These models are used to develop a the...
This paper presents an algebraic theory of instruction sequences with instructions for a random acce...
This paper presents an algebraic theory of instruction sequences with instructions for Turing tapes ...
Graduation date: 1990This thesis describes the design of a Reduced Instruction Set Computer.\ud Its ...
International audienceModeling the execution of a processor and its instructions is a challenging pr...
In this paper we present a model of computer architecture. The proposed model uses a triplet to desc...
International audience—This paper presents the computing model for In-Memory Computing architecture ...
From the earliest days of computers until the early 1970s, the trend in computer architecture was to...
The modern computer systems that are in use nowadays are mostly processor-dominant, which means that...
Computers with the Von-Neumann architecture improve their processing power with the support of memo...
Micro-architecture designs and methods are provided. A computer processing architecture may include ...
Since the 60's the architectural model used by processors is the 'Von Neumann' model in which a proc...
Processor performance is directly impacted by the latency of the memory system. As processor core cy...