This paper considers alternative directory protocols for providing cache coherence in shared-memory multiprocessors with 32 to 128 processors, where the state requirements of DirN may be considered too large. We consider Dir i B, i = 1; 2; 4, DirN , Tristate (also called superset), Coarse Vector, and three new protocols. The new protocols---Gray-hardware, Gray-software, Home---are optimizations of Tristate that use gray coding to favor near-neighbor sharing. Our results are the first to compare all these protocols with complete applications (and the first evaluation of Tristate with a non-synthetic workload) . Results for three applications---ocean (onedimensional sharing), appbt (three-dimensional sharing) , and barnes (dynamic sharing)...
A wide variety of computer architectures have been proposed to exploit parallelism at different gran...
Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both n...
Multiprocessors with shared memory are considered more general and easier to program than message-pa...
[[abstract]]An optimization scheme for a directory-based cache coherence protocol for multistage int...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
Directory-based cache coherence protocol is accepted as the common technique in large scale shared m...
This paper presents a non-blocking directory-based cache coherence protocol to improve the performan...
The hardware complexity of hardware-only directory protocols in shared-memory multiprocessors has mo...
Recent research shows that the occupancy of the coherence controllers is a major performance bottlen...
Abstract. If current trends continue, today’s small-scale general-purpose CMPs will soon be replaced...
Cache coherence and synchronization between processors have been two critical issues in designing a ...
As computing power has increased over the past few decades, science and engineering have found more ...
Click on the DOI link to access the article (may not be free).While addressing cache coherency in sh...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blo...
A wide variety of computer architectures have been proposed to exploit parallelism at different gran...
Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both n...
Multiprocessors with shared memory are considered more general and easier to program than message-pa...
[[abstract]]An optimization scheme for a directory-based cache coherence protocol for multistage int...
[[abstract]]A cache coherence protocol for a multiprocessor system. Each processor in the system has...
Directory-based cache coherence protocol is accepted as the common technique in large scale shared m...
This paper presents a non-blocking directory-based cache coherence protocol to improve the performan...
The hardware complexity of hardware-only directory protocols in shared-memory multiprocessors has mo...
Recent research shows that the occupancy of the coherence controllers is a major performance bottlen...
Abstract. If current trends continue, today’s small-scale general-purpose CMPs will soon be replaced...
Cache coherence and synchronization between processors have been two critical issues in designing a ...
As computing power has increased over the past few decades, science and engineering have found more ...
Click on the DOI link to access the article (may not be free).While addressing cache coherency in sh...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blo...
A wide variety of computer architectures have been proposed to exploit parallelism at different gran...
Caches have the potential to provide multiprocessors with an automatic mechanism for reducing both n...
Multiprocessors with shared memory are considered more general and easier to program than message-pa...