COP - Cache Optimization Tools for Scientific Computing

The technological improvements in silicon manufacturing are yielding vast increases of processor 's speed and memory chip capacity. At the same time, the main memory access time is experiencing modest gains, creating a dramatic disparity between the processor's clock and the access time of main memory. These developments make the effective use of the cache memory paramount to overall program efficiency, thereby increasing the importance of cache optimization techniques. The proposed research focuses on novel tools that will assist the programmer and/or compiler in tuning up the program performance to the cache parameters of the target architecture. One tool will focus on compile-time optimizations. It will use event-driven cache simulation for determining the cache miss rate for loop nests for various target architectures. The proposed technique is based on compile-time analysis of the references of a loop nest which finds for each reference the values of the loop index variables that ..