We describe an efficient validity checker for the quantifier-free logic of equality with uninterpreted functions. This logic is well suited for verifying microprocessorcontrol circuitry since it allows the abstraction of datapath values and operations. Our validity checker uses special data structures to speed up case splitting, and powerful heuristics to reduce the number of case splits needed. In addition, we present experimental results and show that this implementation has enabled the automatic verification of an actual high-level microprocessor description. 1 Introduction As microprocessor designs become more complex, the cost of validation becomes a larger fraction of the total design cost. Currently, validation consumes 25-30% of t...
Abstract. The logic of equality with uninterpreted functions has been proposed for verifying abstrac...
AbstractWe compare SAT-checkers and decision diagrams on the evaluation of Boolean formulae produced...
Our work addresses the challenge of scaling pre-silicon functional verification of hardware designs ...
Modern processors have relatively simple specificationsbased on their instruction set architectures....
The logic of Equality with Uninterpreted Functions (EUF) provides a means of abstracting the manipul...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2]...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipul...
The property of Positive Equality [2] dramatically speeds up validity checking of formulas in the ...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the ma-nipu...
In using the logic of equality with unininterpreted functions to verify hardware systems, specific ...
Abstract. The property of Positive Equality [2] dramatically speeds up validity checking of formulas...
We present a collection of ideas that allows the pipeline verification method pioneered by Burch an...
. The logic of equality with uninterpreted functions has been proposed for verifying abstract hardwa...
<p>As technological advances enable computers to permeate many of our society's critical application...
Abstract. The logic of equality with uninterpreted functions has been proposed for verifying abstrac...
AbstractWe compare SAT-checkers and decision diagrams on the evaluation of Boolean formulae produced...
Our work addresses the challenge of scaling pre-silicon functional verification of hardware designs ...
Modern processors have relatively simple specificationsbased on their instruction set architectures....
The logic of Equality with Uninterpreted Functions (EUF) provides a means of abstracting the manipul...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2]...
We study the applicability of the logic of Positive Equality with Uninterpreted Functions (PEUF) [2...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the manipul...
The property of Positive Equality [2] dramatically speeds up validity checking of formulas in the ...
The logic of equality with uninterpreted functions (EUF) provides a means of abstracting the ma-nipu...
In using the logic of equality with unininterpreted functions to verify hardware systems, specific ...
Abstract. The property of Positive Equality [2] dramatically speeds up validity checking of formulas...
We present a collection of ideas that allows the pipeline verification method pioneered by Burch an...
. The logic of equality with uninterpreted functions has been proposed for verifying abstract hardwa...
<p>As technological advances enable computers to permeate many of our society's critical application...
Abstract. The logic of equality with uninterpreted functions has been proposed for verifying abstrac...
AbstractWe compare SAT-checkers and decision diagrams on the evaluation of Boolean formulae produced...
Our work addresses the challenge of scaling pre-silicon functional verification of hardware designs ...