. Verifying a 64-bit multiplier has a computational complexity that puts it beyond the grasp of current finite-state algorithms, including those based upon homomorphic reduction, the induction principle, and bdd fixed-point algorithms. Theorem proving, while not bound by the same computational constraints, may not be feasible for routinely coping with the complex, low-level details of a real multiplier. We show how to verify such a multiplier by applying COSPAN, a model-checking algorithm, to verify local properties of the complex low-level circuit, and using TLP, a theorem prover based on the Temporal Logic of Actions, to prove that these properties imply the correctness of the multiplier. Both verification steps are automated, and we plan...
We present a method for formal verification of transcendental hardware and software algorithms that ...
Most successful automated formal verification tools are based on a bit-level model of computation, w...
In this paper, we propose a new data structure called multiplicative power hybrid decision diagrams ...
Until recently, verifying multipliers with formal methods was not feasible, even for small input wor...
We propose a method based on unrolling the inductive definition of binary number multiplication to v...
BDD-based approaches cannot handle some arithmetic functions such as multiplication efficiently, whi...
Formal verification of integer multipliers was an open problem for a long time as the size of any re...
Digitale Schaltungen modellieren digitale Komponenten und arithmetische Operationen und sind daher e...
Formal verification of multiplier designs has been studied for decades. However, the practicality of...
In the age of submicron technology a single chip may contain tens or even hundreds of millions trans...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
Most successful automated formal verification tools arebased on a bit-level model of computation, wh...
This paper reports on the verification of two of the IFIP WG10.5 benchmarks --- the multiplier and s...
Most successful automated formal verification tools are based on a bit-level model of computation, w...
If real number calculations are implemented as circuits, only a limited preciseness can be obtained....
We present a method for formal verification of transcendental hardware and software algorithms that ...
Most successful automated formal verification tools are based on a bit-level model of computation, w...
In this paper, we propose a new data structure called multiplicative power hybrid decision diagrams ...
Until recently, verifying multipliers with formal methods was not feasible, even for small input wor...
We propose a method based on unrolling the inductive definition of binary number multiplication to v...
BDD-based approaches cannot handle some arithmetic functions such as multiplication efficiently, whi...
Formal verification of integer multipliers was an open problem for a long time as the size of any re...
Digitale Schaltungen modellieren digitale Komponenten und arithmetische Operationen und sind daher e...
Formal verification of multiplier designs has been studied for decades. However, the practicality of...
In the age of submicron technology a single chip may contain tens or even hundreds of millions trans...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
Most successful automated formal verification tools arebased on a bit-level model of computation, wh...
This paper reports on the verification of two of the IFIP WG10.5 benchmarks --- the multiplier and s...
Most successful automated formal verification tools are based on a bit-level model of computation, w...
If real number calculations are implemented as circuits, only a limited preciseness can be obtained....
We present a method for formal verification of transcendental hardware and software algorithms that ...
Most successful automated formal verification tools are based on a bit-level model of computation, w...
In this paper, we propose a new data structure called multiplicative power hybrid decision diagrams ...