If real number calculations are implemented as circuits, only a limited preciseness can be obtained. Hence, formal verification can not be used to prove the equivalence between the mathematical specification based on real numbers and the corresponding hardware realization. Instead, the number representation has to be taken into account in that certain error bounds have to be verified. For this reason, we propose formal methods to guide the complete design flow of these circuits from the highest abstraction level down to the register-transfer level with formal verification techniques that are appropriate for the corresponding level. Hence, our method is hybrid in the sense that it combines different state-of-the-art verification techniques. ...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
This paper presents a novel technique for proving the correctness of arithmetic circuit designs desc...
Ascertaining correctness of digital hardware designs through simulation does not scale-up for large ...
If real number calculations are implemented as circuits, only a limited preciseness can be obtained....
In this thesis we consider a variety of circuit verification approaches, from simulation-based veri...
International audienceThe paper presents an algebraic approach to functional verification of gate-le...
thesisFormal verification of arithmetic circuits checks whether or not a gate-level circuit correctl...
International audienceComputer arithmetic has applied formal methods and formal proofs for years. As...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
. Verifying a 64-bit multiplier has a computational complexity that puts it beyond the grasp of curr...
The dissertation describes a practically proven, particularly efficient approach for the verificatio...
This paper overviews the application of formal verification techniques to hardware ingeneral, and to...
Despite a considerable progress in verification and abstraction of random and control logic, advance...
Writing accurate numerical software is hard because of many sources of unavoidable uncertainties, in...
One of the most severe short-comings of currently available equiva-lence checkers is their inability...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
This paper presents a novel technique for proving the correctness of arithmetic circuit designs desc...
Ascertaining correctness of digital hardware designs through simulation does not scale-up for large ...
If real number calculations are implemented as circuits, only a limited preciseness can be obtained....
In this thesis we consider a variety of circuit verification approaches, from simulation-based veri...
International audienceThe paper presents an algebraic approach to functional verification of gate-le...
thesisFormal verification of arithmetic circuits checks whether or not a gate-level circuit correctl...
International audienceComputer arithmetic has applied formal methods and formal proofs for years. As...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
. Verifying a 64-bit multiplier has a computational complexity that puts it beyond the grasp of curr...
The dissertation describes a practically proven, particularly efficient approach for the verificatio...
This paper overviews the application of formal verification techniques to hardware ingeneral, and to...
Despite a considerable progress in verification and abstraction of random and control logic, advance...
Writing accurate numerical software is hard because of many sources of unavoidable uncertainties, in...
One of the most severe short-comings of currently available equiva-lence checkers is their inability...
This dissertation investigates the problems of two distinctive formal verification techniques for ve...
This paper presents a novel technique for proving the correctness of arithmetic circuit designs desc...
Ascertaining correctness of digital hardware designs through simulation does not scale-up for large ...