this paper, we propose to use the Pure Esterel synchronization kernel of the Esterel language [4, 8, 2] that was specifically designed for modular descriptions of control. We present specific techniques to optimize the generated circuits. Using a set of benchmarks, we show that we obtain circuits that are smaller and faster than those obtained by available state encoding techniques and that our approach does scale up to controllers having hundreds of states
This paper presents an approach to accelerate reactive processing via an external logic block that h...
AbstractA hallmark of the Esterel language is the combination of perfect synchrony with total orthog...
Several efficient compilation techniques have been re-cently proposed for the generation of sequenti...
We present a new procedure for automatically synthesizing controllers from high-level Esterel specif...
Producing efficient circuits from high-level language descriptions remains a problem. This paper pro...
Presenting designers with higher-level specification languages is one sure way to improve productivi...
State assignment is a formidable task. As designs written in a hardware description language such as...
International audienceSeveral efficient compilation techniques have been recently proposed for the g...
The fine-grained parallelism and the need for determinism are traditional issues in the design of re...
The aim of this master's thesis is to elasticize Esterel. Esterel is an imperative hardware descript...
Synchronous programming languages like Esterel are becoming more and more popular for the design of ...
Embedded systems often suffer from severe resource constraints such as limited memory for programs a...
Abstract—Embedded hard real-time software systems often need fine-grained parallelism and precise co...
Executing concurrent specifications on sequential hardware is important for both simulation of syste...
Esterel is a synchronous, imperative language designed to specify deterministic control systems. How...
This paper presents an approach to accelerate reactive processing via an external logic block that h...
AbstractA hallmark of the Esterel language is the combination of perfect synchrony with total orthog...
Several efficient compilation techniques have been re-cently proposed for the generation of sequenti...
We present a new procedure for automatically synthesizing controllers from high-level Esterel specif...
Producing efficient circuits from high-level language descriptions remains a problem. This paper pro...
Presenting designers with higher-level specification languages is one sure way to improve productivi...
State assignment is a formidable task. As designs written in a hardware description language such as...
International audienceSeveral efficient compilation techniques have been recently proposed for the g...
The fine-grained parallelism and the need for determinism are traditional issues in the design of re...
The aim of this master's thesis is to elasticize Esterel. Esterel is an imperative hardware descript...
Synchronous programming languages like Esterel are becoming more and more popular for the design of ...
Embedded systems often suffer from severe resource constraints such as limited memory for programs a...
Abstract—Embedded hard real-time software systems often need fine-grained parallelism and precise co...
Executing concurrent specifications on sequential hardware is important for both simulation of syste...
Esterel is a synchronous, imperative language designed to specify deterministic control systems. How...
This paper presents an approach to accelerate reactive processing via an external logic block that h...
AbstractA hallmark of the Esterel language is the combination of perfect synchrony with total orthog...
Several efficient compilation techniques have been re-cently proposed for the generation of sequenti...