On Memory Models and Cache Management for Shared-Memory Multiprocessors

Shared-memory multiprocessors should be designed to provide for correct execution of programs constructed according to a chosen program execution model. In this paper, we use dataflow signal graphs as a program execution model for programs structured as nests of (possibly recursive) functions, and using incremental arrays with I-structure semantics. We introduce a memory model for the memory system of a shared-memory multiprocessor that has synchronizing write and read operations, and discuss how it supports our program execution model. An implementation of the memory model is presented that includes caching of remote words. The relationship of our model to the Monsoon multiprocessor and other latency-tolerant multiprocessor architectures is discussed, and it is also contrasted with multiprocessor designs based on memory consistency models. Keywords: Shared-Memory Multiprocessor, Memory Model, Program Execution Model, Cache Management, Incremental Arrays i Contents 1 Introduction 1 ..