The Tomasulo Algorithm is the classical scheduler supporting out-of-order execution; it is widely used in current high performance micro processors. In this paper, we combine the Tomasulo Scheduler with a reorder buffer which implements precise interrupts, and we give a mathematical correctness proof for this enhanced scheduling algorithm. We show that data consistency is maintained, and that the scheduling is deadlock free and fair
Preemptive schedulers have been widely adopted in single processor real-time systems to avoid the bl...
[[abstract]]This paper describes three algorithms for scheduling preemptive, imprecise tasks on a pr...
Preemptive scheduling of periodically arriving tasks on a multiprocessor is considered. We show that...
Subject of this thesis is the formal verification of pipelined microprocessors. This includes proces...
Includes bibliographical references (page 27)In order to achieve maximum throughput and efficiency, ...
Modern processors use out-of-order processing logic to achieve high performance in Instructions Per ...
The application of computers in safety-critical systems is expanding rapidly. With reliability speci...
Subject of this thesis is the formal verification of pipelined microprocessors. This includes proces...
Following a brief discussion of uniprocessor scheduling in which we argue the case for formal analys...
(eng) Abstract Most list scheduling heuristics rely on a simple platform model where communication c...
In this thesis we review and extend the pervasive correctness proof for an asynchronous distributed ...
This paper is proposing a general periodicity result concerning any deterministic and memoryless sch...
Automated software verification can prove the correctness of a program with respect to a given speci...
Anytime algorithms offer a tradeoff between computation time and the quality of the result returned....
A time slot is defined as contention-free if the number of jobs with remaining executions in the slo...
Preemptive schedulers have been widely adopted in single processor real-time systems to avoid the bl...
[[abstract]]This paper describes three algorithms for scheduling preemptive, imprecise tasks on a pr...
Preemptive scheduling of periodically arriving tasks on a multiprocessor is considered. We show that...
Subject of this thesis is the formal verification of pipelined microprocessors. This includes proces...
Includes bibliographical references (page 27)In order to achieve maximum throughput and efficiency, ...
Modern processors use out-of-order processing logic to achieve high performance in Instructions Per ...
The application of computers in safety-critical systems is expanding rapidly. With reliability speci...
Subject of this thesis is the formal verification of pipelined microprocessors. This includes proces...
Following a brief discussion of uniprocessor scheduling in which we argue the case for formal analys...
(eng) Abstract Most list scheduling heuristics rely on a simple platform model where communication c...
In this thesis we review and extend the pervasive correctness proof for an asynchronous distributed ...
This paper is proposing a general periodicity result concerning any deterministic and memoryless sch...
Automated software verification can prove the correctness of a program with respect to a given speci...
Anytime algorithms offer a tradeoff between computation time and the quality of the result returned....
A time slot is defined as contention-free if the number of jobs with remaining executions in the slo...
Preemptive schedulers have been widely adopted in single processor real-time systems to avoid the bl...
[[abstract]]This paper describes three algorithms for scheduling preemptive, imprecise tasks on a pr...
Preemptive scheduling of periodically arriving tasks on a multiprocessor is considered. We show that...