Major chip manufacturers have all introduced multicore microprocessors. Multi-socket systems built from these processors are used for running various server applications. However to the best of our knowledge current commercial operating systems are not optimized for multi-threaded workloads running on such servers. Cache-to-cache transfers and remote memory accesses impact the performance of such workloads. This paper presents a unified approach to optimizing OS scheduling algorithms for both cache-to-cache transfers and remote DRAM accesses that also takes cache affinity into account. By observing the patterns of local and remote cache-to-cache transfers as well as local and remote DRAM accesses for every thread in each scheduling quantum ...
[[abstract]]Uses a trace-driven simulation technique to study the performance impact on the storage ...
One of the main problems in multi-core systems is the contention of shared resources such as cache, ...
This paper proposes a task scheduling approach for reliable cache architectures (RCAs) of multiproce...
Major chip manufacturers have all introduced multicore microprocessors. Multi-socket systems built f...
As a process executes on a CPU, it builds up state in that CPU's cache. In multiprogrammed work...
We present a new operating system scheduling algorithm for multicore processors. Our algorithm reduc...
In multicore systems tasks running on one core may experience inter-task interference from tasks run...
Shared memory multiprocessor systems are becoming increasingly important and common. Multiprocessor ...
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for modern comput-...
In multicore systems, shared resources such as caches or the memory subsystem can lead to contention...
The widening spectrum of network applications incurs increasing stress on physical resources for bot...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
© 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
The unpredictable nature of modern workloads, characterized by frequent branches and control transfe...
In chip multiprocessors (CMPs), limiting the number of off-chip cache misses is crucial for good per...
[[abstract]]Uses a trace-driven simulation technique to study the performance impact on the storage ...
One of the main problems in multi-core systems is the contention of shared resources such as cache, ...
This paper proposes a task scheduling approach for reliable cache architectures (RCAs) of multiproce...
Major chip manufacturers have all introduced multicore microprocessors. Multi-socket systems built f...
As a process executes on a CPU, it builds up state in that CPU's cache. In multiprogrammed work...
We present a new operating system scheduling algorithm for multicore processors. Our algorithm reduc...
In multicore systems tasks running on one core may experience inter-task interference from tasks run...
Shared memory multiprocessor systems are becoming increasingly important and common. Multiprocessor ...
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for modern comput-...
In multicore systems, shared resources such as caches or the memory subsystem can lead to contention...
The widening spectrum of network applications incurs increasing stress on physical resources for bot...
Our thesis is that operating systems should manage the on-chip shared caches of multicore processors...
© 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
The unpredictable nature of modern workloads, characterized by frequent branches and control transfe...
In chip multiprocessors (CMPs), limiting the number of off-chip cache misses is crucial for good per...
[[abstract]]Uses a trace-driven simulation technique to study the performance impact on the storage ...
One of the main problems in multi-core systems is the contention of shared resources such as cache, ...
This paper proposes a task scheduling approach for reliable cache architectures (RCAs) of multiproce...