Conflict Reduction Techniques for GPU Transactional Memory Systems

The continued evolution of GPUs have enabled the use of irregular algorithms which involve fine-grained data sharing between threads, as well as transaction processing applications such as databases. Transactional Memory (TM) is derived from databases, which by itself is a programming construct that simplifies the programming of parallel workloads and combines the advantages of traditional approaches including fine-grained and coarse-grained locking. While hardware support for TM has started to enter mainstream commodity products, it is much farther from becoming reality on the GPU and is still being researched. In this dissertation, we study the challenges for supporting transactional workloads on the GPU, as well as propose methods for performance improvement. On the low level, this dissertation discusses the design of various facets of software and hardware TM designs on the GPU. Chapter 1 discusses the relationship between GPU, transactional memory and transactional memory systems. Chapters 2 and 3 discuss two hardware improvements upon an existing proposal for hardware TM for the GPU, which are able to reduce contention and improve performance for various workloads. On the high level, this dissertation discusses the implications of incorporating emerging NVRAM technologies into GPUs for building transaction processing systems. The NVRAM delivers a higher capacity and fast access speed, filling the gap between the main memory and external storage. In addition, it possesses the non-volatility property. As such, the incorporation of NVRAM affects several facets of the system, with issues that need to be addressed to achieve optimal performance. We discuss the software-based method we’re proposing for efficient transaction processing involving NVRAMs in Chapter 4. In Chapter 5, we conclude our work and envision future directions that in which this work may continue