A new dynamic circuit partitioning algorithm for the waveform relaxation method is presented. Such an algorithm dynamically changes the partitioning as the simulation proceeds through the simulation interval. The proposed algorithm is suitable for implementation on a multicomputer. Experimental results show that the algorithm decreases the runtimes for circuits where good static partitioning is difficult to find. This is true both in the ideal case, i.e., when communication overhead for the repartitioning is not included and the load is distributed as evenly as possible among the processors, and in the real-world case, when all the partitioning overhead and load imbalance are included in actual measured run times
This thesis reports the continuing effort towards establishing a parallel numerical algorithm known ...
The large number of coupled lines in an interconnect structure is a serious limiting factor in simul...
A high speed MOS digital circuit simulation program PNAP-1 (Parallel Network Analysis Program) imple...
A new dynamic circuit partitioning algorithm for the waveform relaxation method is presented. Such a...
Several results pertaining to the partitioning of the waveform relaxation (WR) algorithm for dynamic...
Simulation plays an important role in the design of integrated circuits. Due to high costs and large...
In this paper, the authors extend the results of their earlier paper on waveform relamtion (WR), whi...
In this paper, a new methodology for power system dynamic response calculations is presented. The te...
This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using w...
Abstract: Electrical circuit simulation was one of the first CAD tools developed for IC design. The ...
Several theoretical results are presented and simple examples examined in order to determine the sui...
Relaxation-based techniques for the transient analysis of large-scale integrated circuits are promis...
AbstractIn this paper, the practical behavior of circuit simulator users are considered and utilized...
Parallel CAD programs have been extensively reported in the literature. Unfortunately, they are not ...
This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using w...
This thesis reports the continuing effort towards establishing a parallel numerical algorithm known ...
The large number of coupled lines in an interconnect structure is a serious limiting factor in simul...
A high speed MOS digital circuit simulation program PNAP-1 (Parallel Network Analysis Program) imple...
A new dynamic circuit partitioning algorithm for the waveform relaxation method is presented. Such a...
Several results pertaining to the partitioning of the waveform relaxation (WR) algorithm for dynamic...
Simulation plays an important role in the design of integrated circuits. Due to high costs and large...
In this paper, the authors extend the results of their earlier paper on waveform relamtion (WR), whi...
In this paper, a new methodology for power system dynamic response calculations is presented. The te...
This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using w...
Abstract: Electrical circuit simulation was one of the first CAD tools developed for IC design. The ...
Several theoretical results are presented and simple examples examined in order to determine the sui...
Relaxation-based techniques for the transient analysis of large-scale integrated circuits are promis...
AbstractIn this paper, the practical behavior of circuit simulator users are considered and utilized...
Parallel CAD programs have been extensively reported in the literature. Unfortunately, they are not ...
This paper presents a fast algorithm for transient simulation of power grids in VLSI systems using w...
This thesis reports the continuing effort towards establishing a parallel numerical algorithm known ...
The large number of coupled lines in an interconnect structure is a serious limiting factor in simul...
A high speed MOS digital circuit simulation program PNAP-1 (Parallel Network Analysis Program) imple...