This report evaluates two distinct methods of improving the performance of GPU memory systems. Over the past semester, our research has focused on applying a state-of-the-art CPU cache replacement policy on GPUs and exploring headroom of preemptively writing back dirty cache lines. Our first goal is to reduce L1 and L2 cache miss rates on GPU by implementing the Hawkeye cache replacement policy. Hawkeye calculates the optimal cache replacement policy on previous cache accesses in order to train its predictor for future caching decisions. While some benchmarks show performance improvements with Hawkeye, a significant amount of our benchmarks are not sensitive to the performance of the cache. From our experiments, we show that Hawkeye, on ave...
Abstract—With the SIMT execution model, GPUs can hide memory latency through massive multithreading ...
Graphic Processing Units (GPUs) are originally mainly designed to accelerate graphic applications. N...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This report evaluates two distinct methods of improving the performance of GPU memory systems. Over ...
As a throughput-oriented device, Graphics Processing Unit(GPU) has already integrated with cache, wh...
The computation power from graphics processing units (GPUs) has become prevalent in many fields of c...
In the last few years, GPGPU computing has become one of the most popular computing paradigms in hig...
The usage of Graphics Processing Units (GPUs) as an application accelerator has become increasingly ...
Current GPU computing models support a mixture of coherent and incoherent classes of memory operatio...
This paper presents novel cache optimizations for massively parallel, throughput-oriented architectu...
Data exchange between a Central Processing Unit (CPU) and a Graphic Processing Unit (GPU) can be ver...
abstract: With the massive multithreading execution feature, graphics processing units (GPUs) have b...
Long memory latency and limited throughput become performance bottlenecks of GPGPU applications. The...
Pervasive use of GPUs across multiple disciplines is a result of continuous adaptation of the GPU a...
Since the dawn of computing, CPU performance has continually grown, buoyed by Moore\u27s Law. Execut...
Abstract—With the SIMT execution model, GPUs can hide memory latency through massive multithreading ...
Graphic Processing Units (GPUs) are originally mainly designed to accelerate graphic applications. N...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
This report evaluates two distinct methods of improving the performance of GPU memory systems. Over ...
As a throughput-oriented device, Graphics Processing Unit(GPU) has already integrated with cache, wh...
The computation power from graphics processing units (GPUs) has become prevalent in many fields of c...
In the last few years, GPGPU computing has become one of the most popular computing paradigms in hig...
The usage of Graphics Processing Units (GPUs) as an application accelerator has become increasingly ...
Current GPU computing models support a mixture of coherent and incoherent classes of memory operatio...
This paper presents novel cache optimizations for massively parallel, throughput-oriented architectu...
Data exchange between a Central Processing Unit (CPU) and a Graphic Processing Unit (GPU) can be ver...
abstract: With the massive multithreading execution feature, graphics processing units (GPUs) have b...
Long memory latency and limited throughput become performance bottlenecks of GPGPU applications. The...
Pervasive use of GPUs across multiple disciplines is a result of continuous adaptation of the GPU a...
Since the dawn of computing, CPU performance has continually grown, buoyed by Moore\u27s Law. Execut...
Abstract—With the SIMT execution model, GPUs can hide memory latency through massive multithreading ...
Graphic Processing Units (GPUs) are originally mainly designed to accelerate graphic applications. N...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...