AbstractIn PRAM emulations, universal hashing is a well-known method for distributing the address space among memory modules. However, if the memory access patterns of an application often result in high module congestion, it is necessary to rehash by choosing another hash function and redistributing data on the fly. For the case of linear hash functions h(x) = ax mod m we present an algorithm to rehash an address space of size m = 2u on a PRAM emulation with p processors in time O(mp + log m + L), where L denotes the network latency. For the common case that m is polynomial in p and L = O(log p) the runtime is O(mp + log p). The algorithm requires O(log m + L) words of local storage per processor. We show that an obvious simplification of ...
Abstmct-In most parallel random access machine (PRAM) models, memory references are assumed to take ...
In contemporary computer systems security issues are very important for both safety and reliability ...
Hashing has yet to be widely accepted as a component of hard real-time systems and hardware implemen...
AbstractIn PRAM emulations, universal hashing is a well-known method for distributing the address sp...
AbstractAssume that a set U of memory locations is distributed among n memory modules, using some nu...
We present a novel approach to parallel computing, where (virtual) PRAM processors are represented a...
We present algorithms for the randomized simulation of a shared memory machine (PRAM) on a Distribut...
The present paper provides a comprehensive study of the following problem. Consider algorithms which...
The parallel random access machine (PRAM) is the most commonly used general-purpose machine model fo...
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP)...
The performance of hash tables is analyzed in a parallel context. Assuming that a hash table of fixe...
AbstractWe present a simple algorithm for emulating an N-processor CROW PRAM on an N-ode butterfly. ...
Parallel Random Access Machine, PRAM, is the most popular abstract model of the parallel computation...
textabstractThe influence of several hash functions on the distribution of a shared address space on...
We present efficient emulations of the CRCW PRAM on a large class of processor interconnection netwo...
Abstmct-In most parallel random access machine (PRAM) models, memory references are assumed to take ...
In contemporary computer systems security issues are very important for both safety and reliability ...
Hashing has yet to be widely accepted as a component of hard real-time systems and hardware implemen...
AbstractIn PRAM emulations, universal hashing is a well-known method for distributing the address sp...
AbstractAssume that a set U of memory locations is distributed among n memory modules, using some nu...
We present a novel approach to parallel computing, where (virtual) PRAM processors are represented a...
We present algorithms for the randomized simulation of a shared memory machine (PRAM) on a Distribut...
The present paper provides a comprehensive study of the following problem. Consider algorithms which...
The parallel random access machine (PRAM) is the most commonly used general-purpose machine model fo...
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP)...
The performance of hash tables is analyzed in a parallel context. Assuming that a hash table of fixe...
AbstractWe present a simple algorithm for emulating an N-processor CROW PRAM on an N-ode butterfly. ...
Parallel Random Access Machine, PRAM, is the most popular abstract model of the parallel computation...
textabstractThe influence of several hash functions on the distribution of a shared address space on...
We present efficient emulations of the CRCW PRAM on a large class of processor interconnection netwo...
Abstmct-In most parallel random access machine (PRAM) models, memory references are assumed to take ...
In contemporary computer systems security issues are very important for both safety and reliability ...
Hashing has yet to be widely accepted as a component of hard real-time systems and hardware implemen...