AbstractThis paper describes our on-going research into the design of finite state machines (FSMs) that exhibit self-healing characteristics. The approach adopted here is based on conversion of the traditionally adopted logic hardware design into generic look-up table (LUT) format. Instead of relying upon bespoke hardware mitigation strategies such as triple modular redundancy, our approach relies upon well-established data error detection and correction (EDC) codes that are ideally suited to protecting LUTs. This ‘memory-mapping’ of logic brings self-healing capabilities that can be applied to a wide variety of FSMs. We illustrate our method by mapping a generic automotive used fuel pump controller (FPC) design to LUT format. Built-in repa...
A method is proposed that is focused on reducing the chip area occupied by logic elements creating t...
Very often, a digital system includes sequential blocks which can be represented using a model of th...
Abstract—In digital sequential systems that operate over several time steps, a state-transition faul...
The design of self-checking FSMs can be achieved by adopting an encoding for the state, for the outp...
Practically, any digital system includes sequential blocks represented using a model of finite state...
Due to reduction in device feature size and supply voltages the probability of soft-errors in Finite...
The paper presents a solution to protect FSM implemented on FPGAs from SEU, exploiting the embedded ...
This paper presents the implementation of March-based algorithm as proposed in into an Memory Built-...
A new architecture for matching the data protected with an error-correcting code (ECC) is presented ...
The design of self-checking systems is a viable approach for coping with critical applications, guar...
A method is proposed which aims to reduce the hardware in FPGA-based circuits of Mealy finite state ...
This paper presents a complete methodology to design a totally self-checking (TSC) sequential system...
The start of the digital revolution came through the metal-oxide-semiconductor field-effect transist...
A method is proposed which aims at reducing the numbers of look-up table (LUT) elements in logic cir...
CAD Tools are more and more used by designers, and integrated circuits synthesized using these tools...
A method is proposed that is focused on reducing the chip area occupied by logic elements creating t...
Very often, a digital system includes sequential blocks which can be represented using a model of th...
Abstract—In digital sequential systems that operate over several time steps, a state-transition faul...
The design of self-checking FSMs can be achieved by adopting an encoding for the state, for the outp...
Practically, any digital system includes sequential blocks represented using a model of finite state...
Due to reduction in device feature size and supply voltages the probability of soft-errors in Finite...
The paper presents a solution to protect FSM implemented on FPGAs from SEU, exploiting the embedded ...
This paper presents the implementation of March-based algorithm as proposed in into an Memory Built-...
A new architecture for matching the data protected with an error-correcting code (ECC) is presented ...
The design of self-checking systems is a viable approach for coping with critical applications, guar...
A method is proposed which aims to reduce the hardware in FPGA-based circuits of Mealy finite state ...
This paper presents a complete methodology to design a totally self-checking (TSC) sequential system...
The start of the digital revolution came through the metal-oxide-semiconductor field-effect transist...
A method is proposed which aims at reducing the numbers of look-up table (LUT) elements in logic cir...
CAD Tools are more and more used by designers, and integrated circuits synthesized using these tools...
A method is proposed that is focused on reducing the chip area occupied by logic elements creating t...
Very often, a digital system includes sequential blocks which can be represented using a model of th...
Abstract—In digital sequential systems that operate over several time steps, a state-transition faul...