AbstractThis project involves the real time simulation of hardware fault and analyzing the impact on software performance in a microprocessor system. Here analyzing the instruction level impact on the execution of low level faults in the control logic of a modern microprocessor. According to these results we can extract the instruction level error information and also compare the state of faulty microprocessor with golden results. For mission critical applications this technique is necessary to analyze the impact of low level errors and fault tolerance. The fault injection is done through a GUI. Here the test vehicle for study is Altera's Nios II processor on which spec2000 benchmark is used. Nios II processor handles system calls and other...
Fault injection is a widely used approach for experiment-based dependability evaluation in which fau...
Hardware errors are projected to increase in modern computer systems due to shrinking feature sizes ...
Even if software code is fault-free, hardware failures can alter a value in memory, possibly where t...
AbstractThis project involves the real time simulation of hardware fault and analyzing the impact on...
With continued CMOS scaling, future shipped hardware will be increasingly vulnerable to in-the-field...
This thesis deals with the design and validation of low-cost error detecting mechanisms that can be ...
Evaluating the faulty behaviour of low-cost microprocessor-based boards is an increasingly important...
International audienceDependability is a key decision factor in today's global business environment....
The evolution of high-performance and low-cost microprocessors has led to their almost pervasive usa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
International audienceThis paper presents a non-intrusive hybrid fault detection approach that combi...
This paper presents a non-intrusive hybrid fault detection approach that combines hardware and softw...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The adoption of Microprocessors is increasingly diversifying to several embedded and mo- bile device...
Over three decades of continuous scaling in CMOS technology has led to tremendous improvements in pr...
Fault injection is a widely used approach for experiment-based dependability evaluation in which fau...
Hardware errors are projected to increase in modern computer systems due to shrinking feature sizes ...
Even if software code is fault-free, hardware failures can alter a value in memory, possibly where t...
AbstractThis project involves the real time simulation of hardware fault and analyzing the impact on...
With continued CMOS scaling, future shipped hardware will be increasingly vulnerable to in-the-field...
This thesis deals with the design and validation of low-cost error detecting mechanisms that can be ...
Evaluating the faulty behaviour of low-cost microprocessor-based boards is an increasingly important...
International audienceDependability is a key decision factor in today's global business environment....
The evolution of high-performance and low-cost microprocessors has led to their almost pervasive usa...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
International audienceThis paper presents a non-intrusive hybrid fault detection approach that combi...
This paper presents a non-intrusive hybrid fault detection approach that combines hardware and softw...
In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based FPGAs is p...
The adoption of Microprocessors is increasingly diversifying to several embedded and mo- bile device...
Over three decades of continuous scaling in CMOS technology has led to tremendous improvements in pr...
Fault injection is a widely used approach for experiment-based dependability evaluation in which fau...
Hardware errors are projected to increase in modern computer systems due to shrinking feature sizes ...
Even if software code is fault-free, hardware failures can alter a value in memory, possibly where t...