Fabrication and Analysis of Poly-Si Thin Film Transistor and Si Nanowire Field Effect Transistor

本論文是有關低溫多晶矽薄膜電晶體與矽奈米線場效電晶體之製備與分析。利用金屬柱作為冷源及其下方之矽氧氮化物做為吸熱層，可以成功製造出均勻且具有大結晶的低溫多晶矽薄膜。以此方法製備之薄膜電晶體可以達到246 cm2/V-s 的電子遷移率與5×105的開/關比。此外，我們對具有基極結構與傳統結構的低溫多晶矽薄膜電晶體在外加直流與交流偏壓下的衰退行為也做了研究與分析，並發現具有基極結構的多晶矽薄膜電晶體具有較好的穩定度。經過1000秒的交流偏壓後，具有基極結構的多晶矽薄膜電晶體的衰退較傳統電晶體少了一個數量級。對於這個現象，我們提出了一個模型來解釋具有基極結構的多晶矽薄膜電晶體在衰退行為上改善的原因。 我們成功的製作出利用準分子雷射退火所形成之奈米金粒作為催化劑並結合氣-液-固相(VLS) 成長機制所形成之矽奈米線。經由掃描式電子顯微鏡(SEM)的分析結果，以2.5、5和10奈米的金薄膜經由準分子雷射退火所形成之奈米金粒的平均直徑分別為12、13和15奈米。此結果顯示出我們可以經由控制金薄膜的厚度與適當的雷射功率來製備出均勻且大小受到控制的矽奈米線。 我們也研究了經由VLS機制成長的未摻雜與硼摻雜的矽奈米線。未摻雜與硼摻雜矽奈米線的直徑變化分別為18.5至75.3與26.6至66.1奈米。硼摻雜矽奈米線的起始成長溫度較未摻雜的矽奈米線低10度，而且硼摻雜矽奈米線的直徑總是較未摻雜的矽奈米線要來的大。主要的成因是由於通入的乙硼烷有助於矽烷的解離而矽烷正好控制了矽奈米線的成長。 未摻雜、n型與p型摻雜的矽奈米線在溫度460度與壓力25 torr下成功製備。我們以反斯托克斯/斯托克斯強度比例(IAS/IS)來當作樣品溫度的指標。對於 不同摻雜的矽奈米線，因為熱不同所產生的壓縮應力不同而具有不同的拉曼頻率偏移。以反斯托克斯/斯托克斯強度比例對拉曼頻率作圖，硼摻雜、未摻雜、磷摻雜矽奈米線與矽基板的斜率分別是-0.078、 -0.036、 -0.035 和 -0.02 cm-1。不同的斜率代表了不同摻雜矽奈米線中熱誘導所產生的壓縮應力與矽基板不同。 我們利用不同厚度的金薄膜來成長電場導向的矽奈米線。由實驗結果發現1和0.5奈米的金薄膜因為在熱蒸鍍的過程中會形成彼此分離的金微粒而較適合應用於電場導向的矽奈米線成長。此外，0.5至2.5 V/μm 的電場強度較適合應用於控制矽奈米線的定向成長。 為了能夠更加增進矽奈米線定點定向成長的品質，我們使用直徑20奈米的金粒作為之後實驗的催化劑來控制矽奈米線的直徑。在自我對準結構的實驗當中，我們發現部分橫跨過二電極的矽奈米線變的非常巨大，我們提出了直流電漿增強所造成的額外包覆模型來解釋這個現象。我們也發現具有單邊金催化劑的定點成長結構較適合應用於定點定向控制的矽奈米線成長。最後，利用電場導向控制的定點定向奈米矽線場效電晶體已成功製備。上述的方法也顯示出了低成本製備矽奈米線陣列與電子元件的可行性。The fabrication and analysis of poly-Si thin film transistor (TFTs) and Si nanowires (SiNWs) field effect transistor were studied in this thesis. The poly-Si with regular and large grain was fabricated by employing metallic pads as the heat sinks and with underlying silicon oxynitride (SiON) as the heat absorption layer. The TFTs fabricated by this method achieves a field effect mobility of 246 cm2/V-sec and an on/off current ratio exceeding 5×105. Besides, the degradation behavior of body-contact (BC) polysilicon thin film transistors under DC and AC stress were investigated and compared with conventional ones. It was found that the reliability of body-contact poly-Si TFTs is better than the conventional TFTs under both DC and AC stress conditions. After 1000s AC stress, the degradation of BC poly-Si TFTs become an order of magnitude less than the conventional ones. Therefore, a model was proposed to explain the degradation improvement of body-contact poly-Si TFTs. The fabrication of SiNWs has been demonstrated using excimer laser annealed gold nanoparticles as the catalyst and vapor-liquid-solid (VLS) growth. Scanning electron microscopes images of the excimer laser annealed Au nanoparticles from 2.5, 5, and 10 nm Au film showed that the nanoparticles had mean diameters of 12, 13, and, 15nm, respectively. The results show that the diameter controlled uniform silicon nanowires can be obtained utilizing controlled thickness of Au film combined with suitable laser power density. The un-doped and boron-doped SiNWs grown via VLS mechanism were studied. The diameters of un-doped and boron-doped SiNWs varied from 18.5 to 75.3 nm and 26.6 to 66.1 nm, respectively. The critical growth temperature of boron-doped SiNWs is 10 ℃ lower than that of un-doped ones and the diameters of the boron-doped SiNWs is always larger than that of the un-doped ones under different growth temperatures. This is because that the introduction of diborane enhanced the dissociation of SiH4 which determines the growth process of SiNW. Un-doped, N-type, and P-type doped SiNWs were grown at 460oC and 25 torr. The intensity ratio of anti-Stokes/Stokes (IAS/IS) peaks is used as an index of the sample temperature. Different SiNWs exhibit different Raman frequency shifts because their compressive stresses due to heating differ. The slopes of the IAS/IS peak ratio versus the Raman frequency for boron-doped, un-doped, phosphorous-doped SiNWs and bulk Si are -0.078, -0.036, -0.035 and -0.02 per cm-1, respectively. The different slopes reveal the different heating-induced compressive stresses in the SiNWs with different dopants and bulk Si. The electric-field-directed growth of SiNWs was performed utilizing Au film with different thicknesses. It is found that the 1 and 0.5 nm Au film are more suitable for the electric-field-directed growth of SiNWs due to the formation of separated Au clusters during the thermal evaporation. Besides, the electric field in the range 0.5~2.5 V/μm are suitable for the direction controlled growth of SiNWs. For further improvement of the position and direction controlled growth of SiNWs, the 20 nm Au nanoparticles were used as the catalyst to control the diameter of SiNWs. In the self-aligned structure, parts of the SiNWs across the gap become huger and the possible DC plasma enhance coating model is proposed to explain the phenomenon. It is also found that the position controlled structure with one sided Au catalyst is better and more suitable for the position and direction controlled SiNWs growth. Finally, the position and direction controlled SiNWs FETs were successfully fabricated by electric field directed growth. It demonstrates the feasibility to fabricate the SiNWs array and electrical devices with low cost.Chapter 1 Introduction 1 Chapter 2 Polycrystalline Silicon Thin Film Transistor Fabricated by Employing Metallic Periodic Pads 6 2.1 Fabrication of large and regular poly silicon grains 7 2.2 Poly Silicon Thin Film Transistor Fabricated by Employing Periodic Metal Pads 22 2.3 Conclusions 37 Chapter 3 Body-contact Structure to Improve the Reliability of Low Temperature Poly-Si Thin Film Transistor (TFT) 39 3.1 Experiments 40 3.2 Results and Discussion 44 3.3 Conclusions 61 Chapter 4 Growth Mechanism and Raman Study of Silicon Nanowires (SiNWs) 62 4.1 Vapor-Liquid-Solid (VLS) Mechanism of Silicon Nanowires Growth 65 4.2 Silicon Nanowires Synthesized by Vapor-Liquid- Solid (VLS) Growth on Excimer Laser Annealed Thin Gold Film 74 4.3 The Influence of B2H6 on the Growth of Silicon Nanowire 82 4.4 Doping Effects on Raman Spectra of Silicon Nanowires 92 4.5 Conclusions 107 Chapter 5 Electric-field-directed Lateral Growth of Silicon Nanowires and Fabrication of Position Controlled Silicon Nanowires Field Effect Transistors 110 5.1 Electric Field Directed Lateral Growth of Silicon Nanowires 111 5.2 Orientation and Position Controlled Lateral Growth of Silicon Nanowires 123 5.3 Position and direction controlled silicon nanowire field-effect transistors 136 5.4 Conclusions 143 Chapter 6 Conclusions 145 Bibliography 15