Diagnostic tests are designed to detect and isolate faults in sequential systems. The problem is to evaluate the effectiveness of the design. For stuck faults a diagnostic model can be used. A fault simulation strategy is presented for generating this model. First, definitions, for identifying critical inputs are derived. A definition is a statement of the conditions to sensitize an input. Then a fault free simulation is used to generate a critical value array. A critical path is traced through the sensitized inputs marked in the array using a critical value array tracing algorithm that is developed. This algorithm traces a path back in time, as required for a sequential system, to identify detectable faults for the model
Abstract. A mathematical framework for the testing and diagnosis of sequential machines is developed...
Fault diagnosis in discrete event systems is studied using a state-based framework. Faults can be ei...
Technology scaling and manufacturing process affect the performance of digital circuits, making them...
We propose a new method to speed up stuck-at fault simulation for sequential circuits. The method co...
The performance of a fast fault simulation algorithm for combinational circuits, such as the critica...
Sequential fault diagnosis is an approach that realizes fault isolation by executing the optimal tes...
A dynamic diagnosis scheme for synchronous sequential circuits is proposed. In contrast with schemes...
A general framework of the Sequential Diagnosis Tool that is currently under development in the Comp...
Sequential fault diagnosis is an approach that realizes fault isolation by executing the optimal tes...
104 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.Finally, an integrated techni...
Due to the character of the original source materials and the nature of batch digitization, quality ...
This dissertation describes a new simulation technique for an automatic test generation system, SCIR...
Functional redundancy techniques in diagnosis rely on models of a system to infer deviating system v...
A novel approach to testing sequential circuits that uses multi-level decision diagram representatio...
This paper is devoted to measuring the continuous diagnosis capability of a system. A key metric and...
Abstract. A mathematical framework for the testing and diagnosis of sequential machines is developed...
Fault diagnosis in discrete event systems is studied using a state-based framework. Faults can be ei...
Technology scaling and manufacturing process affect the performance of digital circuits, making them...
We propose a new method to speed up stuck-at fault simulation for sequential circuits. The method co...
The performance of a fast fault simulation algorithm for combinational circuits, such as the critica...
Sequential fault diagnosis is an approach that realizes fault isolation by executing the optimal tes...
A dynamic diagnosis scheme for synchronous sequential circuits is proposed. In contrast with schemes...
A general framework of the Sequential Diagnosis Tool that is currently under development in the Comp...
Sequential fault diagnosis is an approach that realizes fault isolation by executing the optimal tes...
104 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.Finally, an integrated techni...
Due to the character of the original source materials and the nature of batch digitization, quality ...
This dissertation describes a new simulation technique for an automatic test generation system, SCIR...
Functional redundancy techniques in diagnosis rely on models of a system to infer deviating system v...
A novel approach to testing sequential circuits that uses multi-level decision diagram representatio...
This paper is devoted to measuring the continuous diagnosis capability of a system. A key metric and...
Abstract. A mathematical framework for the testing and diagnosis of sequential machines is developed...
Fault diagnosis in discrete event systems is studied using a state-based framework. Faults can be ei...
Technology scaling and manufacturing process affect the performance of digital circuits, making them...