Binary tree multiprocessors, such as DADO, have many favorable advantages for hardware implementation. For example, binary trees are planar requiring linear area (VLSI implementations require area which is proportional to the number of processing elements) and are not pin-limited (off chip connections remain constant as device dimensions scale down and more processors are implemented on the chip). One often cited problem for binary trees, however, is that trees are not fault tolerant. In this brief note, we detail a simple method which guarantees operation of a binary tree machine after two successive faults, as well as a 50% chance of proper operation after a third successive fault. This scheme requires no extraordinary engineering changes...
Fault Tree Analysis is now a widely accepted technique to assess the probability and frequency of sy...
Recent trends in transistor technology have dictated the constant reduction of device size. One nega...
The design and implementation of a reliable version of the distributed bitonic sorting algorithm usi...
Reconfigurable binary tree architectures have been widely studied and used in various VLSI implement...
Several families of reconfigurable tree-like architectures, suitable for VLSI implementation, are pr...
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-...
International audienceDue to technology scaling and harsh environments, a wide range of fault tolera...
Multiprocessor systems which afford a high degree of parallelism are used in a variety of applicati...
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-...
An approach to the design of reconfigurable tree architecture is presented in which spare processors...
This thesis presents a general theory for designing multiprocessor computer systems that can tolerat...
Abstract:- Different parallel architectures may require different algorithms to make the existent al...
As conventional silicon Complementary Metal-Oxide-Semiconductor (CMOS) technology continues to shrin...
The trend in modern computing is to develop multiprocessor systems with hundreds, even thousands, of...
Targeting on the future fault-prone hybrid CMOS/Nanodevice digital memories, this paper present two ...
Fault Tree Analysis is now a widely accepted technique to assess the probability and frequency of sy...
Recent trends in transistor technology have dictated the constant reduction of device size. One nega...
The design and implementation of a reliable version of the distributed bitonic sorting algorithm usi...
Reconfigurable binary tree architectures have been widely studied and used in various VLSI implement...
Several families of reconfigurable tree-like architectures, suitable for VLSI implementation, are pr...
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-...
International audienceDue to technology scaling and harsh environments, a wide range of fault tolera...
Multiprocessor systems which afford a high degree of parallelism are used in a variety of applicati...
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-...
An approach to the design of reconfigurable tree architecture is presented in which spare processors...
This thesis presents a general theory for designing multiprocessor computer systems that can tolerat...
Abstract:- Different parallel architectures may require different algorithms to make the existent al...
As conventional silicon Complementary Metal-Oxide-Semiconductor (CMOS) technology continues to shrin...
The trend in modern computing is to develop multiprocessor systems with hundreds, even thousands, of...
Targeting on the future fault-prone hybrid CMOS/Nanodevice digital memories, this paper present two ...
Fault Tree Analysis is now a widely accepted technique to assess the probability and frequency of sy...
Recent trends in transistor technology have dictated the constant reduction of device size. One nega...
The design and implementation of a reliable version of the distributed bitonic sorting algorithm usi...