Signal Degradation in High Speed Systems Due To Chip Breakout Routing Constraints in Package Shadow Region

This thesis submitted in partial fulfillment of the requirements for the degree of B.Sc in Electrical and Electronic Engineering of East West University, Dhaka, Bangladesh.The High Speed Systems involves electrical performance of the wires and other packaging structures used to move signals about within an electronic product. In these early days of modern VLSI era, digital chip circuit design and layout were manual processes. The application of automatic synthesis techniques allowed designers to express their designs using high-level. Language and apply an automated design process to create very complex designs. Such performance is a matter of basic physics and as such has remained relatively unchanged since the inception of digital computing devices. As circuit shrinks in accordance with Moore's law, several signal integrity issues are becoming critical. Several of these issues are ringing, crosstalk, ",round bounce and power supply noise that can cause systems to fail particularly at high frequency. The socket breakout region requires important design consideration when signals are routed through it. In this region the trace width and trace spacing between them have to be decreased to maintain keep out region which are critical for manufacturing boards. However, decreasing trace space and width means increasing impedance. The high speed designer should maintain this thing very carefully as a matter of cost effective