For a parallel Sparse Matrix Vector Multiply (SpMV) on a multiprocessor, rather simple and efficient work distributions often produce good results. In cases where this is not true, adaptive load balancing can improve the balance and performance. This paper introduces a low overhead framework for adaptive load balancing of parallel SpMV operations. It uses statistical filters to gather relevant runtime performance data and detects an imbalance situation. Three different algorithms were compared that adaptively balance the load with high quality and low overhead. Results show that for sparse matrices, where the adaptive load balancing was enabled, an average speedup of 1.15 (regarding the total execution time) could be achieved with our best ...
Multi-core nodes with Non-Uniform Memory Access (NUMA) are now a common architecture for high perfor...
Efficient parallel computing on distributed platforms still presents many obstacles. This paper addr...
We are witnessing a dramatic change in computer architecture due to the multicore paradigm shift, as...
For a parallel Sparse Matrix Vector Multiply (SpMV) on a multiprocessor, rather simple and efficient...
Sparse matrix-vector (SpMV) multiplication is a widely used kernel in scientific applications. In th...
Abstract—In this paper we present two algorithms for perform-ing sparse matrix-dense vector multipli...
Sparse matrix-vector (SpMV) multiplication is a vital building block for numerous scientific and eng...
AbstractSparse matrix vector multiplication (SpMV) is the dominant kernel in scientific simulations....
Part 4: Architecture and HardwareInternational audienceAs a fundamental operation, sparse matrix-vec...
Sparse matrix-vector multiplication (SpMV) solves the product of a sparse matrix and dense vector, a...
Sparse Matrix-vector Multiplication (SMvM) is a mathematical technique encountered in many programs ...
Sparse Matrix-Vector multiplication (SpMV) is an essential kernel for parallel numerical application...
The sparse matrix-vector product is a widespread operation amongst the scientific computing communit...
We design and develop a work-efficient multithreaded algorithm for sparse matrix-sparse vector multi...
Sparse matrix-vector multiplication (SpMV) is an important ker-nel in many scientific applications a...
Multi-core nodes with Non-Uniform Memory Access (NUMA) are now a common architecture for high perfor...
Efficient parallel computing on distributed platforms still presents many obstacles. This paper addr...
We are witnessing a dramatic change in computer architecture due to the multicore paradigm shift, as...
For a parallel Sparse Matrix Vector Multiply (SpMV) on a multiprocessor, rather simple and efficient...
Sparse matrix-vector (SpMV) multiplication is a widely used kernel in scientific applications. In th...
Abstract—In this paper we present two algorithms for perform-ing sparse matrix-dense vector multipli...
Sparse matrix-vector (SpMV) multiplication is a vital building block for numerous scientific and eng...
AbstractSparse matrix vector multiplication (SpMV) is the dominant kernel in scientific simulations....
Part 4: Architecture and HardwareInternational audienceAs a fundamental operation, sparse matrix-vec...
Sparse matrix-vector multiplication (SpMV) solves the product of a sparse matrix and dense vector, a...
Sparse Matrix-vector Multiplication (SMvM) is a mathematical technique encountered in many programs ...
Sparse Matrix-Vector multiplication (SpMV) is an essential kernel for parallel numerical application...
The sparse matrix-vector product is a widespread operation amongst the scientific computing communit...
We design and develop a work-efficient multithreaded algorithm for sparse matrix-sparse vector multi...
Sparse matrix-vector multiplication (SpMV) is an important ker-nel in many scientific applications a...
Multi-core nodes with Non-Uniform Memory Access (NUMA) are now a common architecture for high perfor...
Efficient parallel computing on distributed platforms still presents many obstacles. This paper addr...
We are witnessing a dramatic change in computer architecture due to the multicore paradigm shift, as...