This is a real-time mixed-criticality system on a dual-core Linux desktop. The hardware/software architecture employs memory throttling so that modules can be isolated in execution as well as in analysis/certification. There are two asymmetrically dedicated cores. A critical core runs a hierarchical scheduler (hs) with critical software: hard-coded, or Linux processes with associated metadata. The best-effort core runs arbitrary software. The cores share DRAM and the memory bus. Best- effort activity can delay critical software. Interference is throttled/bounded to retain real- time computability. When necessary, hs freezes/thaws best-effort core software. Task schedulers have budgets to bound memory interference. If depleted, the best-effo...
International audienceMulticore parallelism involve inter-tasks interferences leading to execution t...
In mixed-criticality systems, functionalities of different degrees of importance (or criticalities) ...
Timing guarantee is critical to ensure the correctness of embedded software systems that interact wi...
The increasing interest in the integration of Mixed Criticality Systems (MCS) in Commercial-Off-The-...
Mixed-criticality (MC) multicore system design must reconcile safety guarantees and high performanc...
International audienceThose autonomic concurrent systems which are timing-critical and compute inten...
Mixed-criticality multicore system design must often provide both safety guarantees and high perform...
Modern safety-critical real-time systems are realized via integration of multiple system components ...
The relevance and popularity of mixed-criticality real-time systems precipitously increase in many i...
Abstract—Multicore systems are being increasingly used for embedded system deployments, even in safe...
Multicore processors have imported the powerful computing capacity to real-time systems, allowing th...
The most significant trend in real-time systems design in recent years has been the adoption of mult...
International audienceMemory access duration on multicore architectures are highly variable, since c...
Abstract—The functional consolidation induced by the cost-reduction trends in embedded systems can f...
Timing guarantee is critical to ensure the correctness of embedded software systems that interact wi...
International audienceMulticore parallelism involve inter-tasks interferences leading to execution t...
In mixed-criticality systems, functionalities of different degrees of importance (or criticalities) ...
Timing guarantee is critical to ensure the correctness of embedded software systems that interact wi...
The increasing interest in the integration of Mixed Criticality Systems (MCS) in Commercial-Off-The-...
Mixed-criticality (MC) multicore system design must reconcile safety guarantees and high performanc...
International audienceThose autonomic concurrent systems which are timing-critical and compute inten...
Mixed-criticality multicore system design must often provide both safety guarantees and high perform...
Modern safety-critical real-time systems are realized via integration of multiple system components ...
The relevance and popularity of mixed-criticality real-time systems precipitously increase in many i...
Abstract—Multicore systems are being increasingly used for embedded system deployments, even in safe...
Multicore processors have imported the powerful computing capacity to real-time systems, allowing th...
The most significant trend in real-time systems design in recent years has been the adoption of mult...
International audienceMemory access duration on multicore architectures are highly variable, since c...
Abstract—The functional consolidation induced by the cost-reduction trends in embedded systems can f...
Timing guarantee is critical to ensure the correctness of embedded software systems that interact wi...
International audienceMulticore parallelism involve inter-tasks interferences leading to execution t...
In mixed-criticality systems, functionalities of different degrees of importance (or criticalities) ...
Timing guarantee is critical to ensure the correctness of embedded software systems that interact wi...