Embedded control programs are hard to analyse because their behaviour depends on how they interact with hardware devices. In particular, embedded code typically uses interrupts to respond to external events in a timely manner. Such asynchronous control constructs make static analysis difficult due to the potentially large number of alternative control-flow paths they allow. We show how model checking can be used to effectively analyse the behaviour of interrupt-dependent programs. This is done by developing an abstraction of the code that captures its essential timing and functional properties, including those related to external interrupts. The model is made efficient by grouping program instructions into basic blocks whose behaviour is at...
Resource-constrained devices are becoming ubiquitous. Examples include cell phones, palm pilots, and...
Static checking can provide safe and tight bounds on stack usage and execution times in interrupt-dr...
An interrupt is an event that alters the sequence of instructions executed by a processor and requir...
Embedded control programs are hard to analyse because their behaviour depends on how they interact w...
AbstractThis paper presents an approach to the efficient abstraction of interrupt handling in microc...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
A widely-used class of real-time, reactive, embedded systems is called interrupt-driven systems [8]....
The interrupt mechanism in a system-on-chip (SoC) joins the SoCs hardware and software behaviors. We...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
Abstract—Interrupt-driven software is difficult to test and debug, especially when interrupts can be...
When trying to track down bugs using cyclic debugging, the ability to correctly reproduce executions...
ManuscriptWhile developing embedded and real-time systems, it is usually necessary to write code tha...
In this work we present a verification framework for applications for the embedded system operating ...
textabstractFormal methods, especially model checking, are an indispensable part of the software eng...
Interrupts are important aspects of real-time embedded systems to handle events in time. When there ...
Resource-constrained devices are becoming ubiquitous. Examples include cell phones, palm pilots, and...
Static checking can provide safe and tight bounds on stack usage and execution times in interrupt-dr...
An interrupt is an event that alters the sequence of instructions executed by a processor and requir...
Embedded control programs are hard to analyse because their behaviour depends on how they interact w...
AbstractThis paper presents an approach to the efficient abstraction of interrupt handling in microc...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
A widely-used class of real-time, reactive, embedded systems is called interrupt-driven systems [8]....
The interrupt mechanism in a system-on-chip (SoC) joins the SoCs hardware and software behaviors. We...
Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested a...
Abstract—Interrupt-driven software is difficult to test and debug, especially when interrupts can be...
When trying to track down bugs using cyclic debugging, the ability to correctly reproduce executions...
ManuscriptWhile developing embedded and real-time systems, it is usually necessary to write code tha...
In this work we present a verification framework for applications for the embedded system operating ...
textabstractFormal methods, especially model checking, are an indispensable part of the software eng...
Interrupts are important aspects of real-time embedded systems to handle events in time. When there ...
Resource-constrained devices are becoming ubiquitous. Examples include cell phones, palm pilots, and...
Static checking can provide safe and tight bounds on stack usage and execution times in interrupt-dr...
An interrupt is an event that alters the sequence of instructions executed by a processor and requir...