Software Managed Multicore (SMM) architectures have advantageous scalability, power efficiency, and predictability characteristics, making SMM particularly promising for real-time systems. In SMM architectures, each core can only access its scratchpad memory (SPM); any access to main memory is done explicitly by DMA instructions. As a consequence, dynamic code management techniques are essential for loading program code from the main memory to SPM. Current state-of-the-art dynamic code management techniques for SMM architectures are, however, optimized for average-case execution time, not worst-case execution time (WCET), which is vital for hard real-time systems. In this paper, we present two novel WCET-aware dynamic SPM code management te...
Abstract—This paper compares two proposed alternatives to conventional instruction caches: a scratch...
<p>An increasing number of processor architectures support scratch-pad memory - software manag...
In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed ins...
This paper presents a dynamic scratchpad memory (SPM) code allocation technique for embedded systems...
Software Managed Multicore (SMM) architectures have been proposed as a solution for scaling the memo...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
In modern processor architectures, caches are widely used to shorten the gap between the processor s...
In this paper, we propose a fully automatic dynamic scratch-pad memory (SPM) management technique fo...
Over the past years, multicore systems emerged into the domain of hard real-time systems. These syst...
Scratchpad memory is a popular choice for on-chip storage in real-time embedded systems. The allocat...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Many embedded systems feature processors coupled with a small and fast scratchpad memory. To the dif...
In recent years, the real-time community has produced a variety of approaches targeted at managing o...
Modern embedded hard real-time systems feature multiple tasks running on multiple processing cores. ...
Abstract—This paper compares two proposed alternatives to conventional instruction caches: a scratch...
<p>An increasing number of processor architectures support scratch-pad memory - software manag...
In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed ins...
This paper presents a dynamic scratchpad memory (SPM) code allocation technique for embedded systems...
Software Managed Multicore (SMM) architectures have been proposed as a solution for scaling the memo...
To improve the execution time of a program, parts of its instructions can be allocated to a fast Scr...
abstract: Cyber-physical systems and hard real-time systems have strict timing constraints that spec...
In modern processor architectures, caches are widely used to shorten the gap between the processor s...
In this paper, we propose a fully automatic dynamic scratch-pad memory (SPM) management technique fo...
Over the past years, multicore systems emerged into the domain of hard real-time systems. These syst...
Scratchpad memory is a popular choice for on-chip storage in real-time embedded systems. The allocat...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Many embedded systems feature processors coupled with a small and fast scratchpad memory. To the dif...
In recent years, the real-time community has produced a variety of approaches targeted at managing o...
Modern embedded hard real-time systems feature multiple tasks running on multiple processing cores. ...
Abstract—This paper compares two proposed alternatives to conventional instruction caches: a scratch...
<p>An increasing number of processor architectures support scratch-pad memory - software manag...
In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed ins...