One of the latest concurrent programming technologies is Software Transactional Memory (STM). This degree project studied the use of STM by taking the large open-source computer game Globulation2 and modifying it from a non-concurrent version to several concurrent versions – a lock-based version and a STM version with finer granularity, as well as an additional STM version with coarser granularity. The different game versions were to be compiled with a STM compiler, which resulted in an evaluation of existing STM compilers. The first choice LLVM and Tanger turned out to be unable to compile the game versions because Tanger lacked an irrevocable mode and support for exceptions inside transactions as well as basic C++ support needed by the ga...
In computer science, software transactional memory (STM) is a concurrency control mechanism analogou...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
With the advent of chip-multiprocessors, we are faced with the challenge of paral-lelizing performan...
To realize the performance potential of multiple cores, soft-ware developers must architect their pr...
Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write prog...
Transactional Memory (TM) promises to simplify concurrent pro-gramming, which has been notoriously d...
Transactional memory (TM) is a promising parallel programming paradigm for generic applications on l...
The introduction of general purpose computing on many-core graphics processor systems, and the gener...
Software transactional memory (STM) systems are an attractive environment to evaluate optimistic con...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Software transactional memory (STM) is a promising technique for controlling concurrency in modern m...
Software transactional memory (STM) is a promis-ing technique for controlling concurrency in mod-ern...
Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lo...
The past few years have marked the start of a historic transition from sequential to parallel comput...
In computer science, software transactional memory (STM) is a concurrency control mechanism analogou...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
With the advent of chip-multiprocessors, we are faced with the challenge of paral-lelizing performan...
To realize the performance potential of multiple cores, soft-ware developers must architect their pr...
Transactional memory (TM), a new programming paradigm, is one of the latest approaches to write prog...
Transactional Memory (TM) promises to simplify concurrent pro-gramming, which has been notoriously d...
Transactional memory (TM) is a promising parallel programming paradigm for generic applications on l...
The introduction of general purpose computing on many-core graphics processor systems, and the gener...
Software transactional memory (STM) systems are an attractive environment to evaluate optimistic con...
Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Man...
The advent of multicore processors has put the performance of traditional parallel programming techn...
Software transactional memory (STM) is a promising technique for controlling concurrency in modern m...
Software transactional memory (STM) is a promis-ing technique for controlling concurrency in mod-ern...
Transactional Memory (TM) is a new programming paradigm that offers an alternative to traditional lo...
The past few years have marked the start of a historic transition from sequential to parallel comput...
In computer science, software transactional memory (STM) is a concurrency control mechanism analogou...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performanc...
With the advent of chip-multiprocessors, we are faced with the challenge of paral-lelizing performan...