We present a radix-8 divider that uses an over-redundant digit set for the quotient in order to obtain simple digit selection rules. We show that the proposed enlarged set of values for the quotient digit does not lead to increases both in the complexity and the delay of the adder required to update the remainder, with respect to similar solutions, since the values allowed for the quotient digit have been selected carefully. The digit selection process is subdivided into two concurrent steps, each one making reference to a secondary digit set and the resulting implementation can be cheaper and faster than other units which do not use over-redundant digit sets. A performance analysis estimates a speed improvement from 25% to 35% with respect...
: The digit-recurrence division relies on a sequence of addition/subtraction and shift operations i...
High-radix division, developing several quotient bits per clock, is usually limited by the difficult...
A division algorithm in which the quotient-digit selection is performed by rounding the shifted resi...
Over-redundant digit sets are defined as those ranging from -s to +s, with s⩾B, B being the radix. T...
This paper presents a derivation of four radix-2 division algorithms by digit recurrence. Each divis...
In this paper, we propose a class of division algorithms with the aim of reducing the delay of the s...
A new implementation for minimally redundant radix-4 SRT division with the recurrence in the signed-...
A new implementation for minimally redundant radix-4 SRT division with the recurrence in the signed-...
The speed of SRT-type dividers is mainly determined by the complexity of the quotient-digit selectio...
The speed of high-radix digit-recurrence dividers is mainly determined by the hardware complexity of...
ISBN: 0818669055The digit-recurrence division relies on a sequence of addition/subtraction and shift...
[[abstract]]A new floating-point division architecture that complies with the IEEE 754-1985 standard...
[[abstract]]In recent years, computer applications have increased in the computational complexity. T...
Almost all recent microprocessors and DSP chips perform addition, subtraction, multiplication and di...
A radix 4 division architecture is presented which partially overlaps the updating of the remainder ...
: The digit-recurrence division relies on a sequence of addition/subtraction and shift operations i...
High-radix division, developing several quotient bits per clock, is usually limited by the difficult...
A division algorithm in which the quotient-digit selection is performed by rounding the shifted resi...
Over-redundant digit sets are defined as those ranging from -s to +s, with s⩾B, B being the radix. T...
This paper presents a derivation of four radix-2 division algorithms by digit recurrence. Each divis...
In this paper, we propose a class of division algorithms with the aim of reducing the delay of the s...
A new implementation for minimally redundant radix-4 SRT division with the recurrence in the signed-...
A new implementation for minimally redundant radix-4 SRT division with the recurrence in the signed-...
The speed of SRT-type dividers is mainly determined by the complexity of the quotient-digit selectio...
The speed of high-radix digit-recurrence dividers is mainly determined by the hardware complexity of...
ISBN: 0818669055The digit-recurrence division relies on a sequence of addition/subtraction and shift...
[[abstract]]A new floating-point division architecture that complies with the IEEE 754-1985 standard...
[[abstract]]In recent years, computer applications have increased in the computational complexity. T...
Almost all recent microprocessors and DSP chips perform addition, subtraction, multiplication and di...
A radix 4 division architecture is presented which partially overlaps the updating of the remainder ...
: The digit-recurrence division relies on a sequence of addition/subtraction and shift operations i...
High-radix division, developing several quotient bits per clock, is usually limited by the difficult...
A division algorithm in which the quotient-digit selection is performed by rounding the shifted resi...