GLOBAL JOURNAL OFENGINEERINGSCIENCE ANDRESEARCHES DESIGN OF KARATSUBAMULTIPLIER FOR LOW POWER FIR FILTER

In this paper the problem of optimizing the gate-level area in digit-serial MCM designs has been addressed and introduces high level synthesis algorithms and design architectures. The optimization algorithms and the digit-serial MCM architectures have efficiency in the design of digit-serial MCM operations and Finite Impulse Response filters. The conventional digit serial method increases power of the FIR architecture it has been optimized through the proposed Karatsuba's method of multiplication. Experimental results show the efficiency of the proposed optimization algorithm shows much reduction in power of finite impulse response filters. Keywords:- Karatsuba, FIR, Filter etc. I