Add to ORKGAbstract—We explore the feasibility of using a coarse-grain overlay to transparently and dynamically accelerate the execution of hot segments of code that run on soft processors. The overlay, referred to as the Virtual Dynamically Reconfigurable (VDR), is tuned to realize data flow graphs in which nodes are machine instructions and the edges are inter-instruction dependences. A VDR consists of an array of functional units that are interconnected by a set of programmable switches. It can be rapidly configured by the soft processor at run-time to implement a given data flow graph. The use of a VDR overcomes two key challenges with run-time translation of code into circuits: the prohibitive compile time of standard synthesis tools and the limi...
High-level synthesis tools aim to produce hardware designs out of software descriptions with a goal ...
Coarse-grained FPGA overlays have emerged as one possible solution to make FPGAs more accessible to ...
FPGA-based soft processors customized for operations on sparse graphs can deliver significant perfor...
Coarse-grained FPGA overlays built around the runtime programmable DSP blocks in modern FPGAs can ac...
FPGAs can deliver high performance but their programmability wall hinders widespread use: they requi...
Even though it seems that FPGAs have finally made the transition from research labs to the consumer ...
Overlay architectures are programmable logic systems that are compiled on top of a traditional FPGA....
This paper describes a framework supporting the automatic composition of reconfigurable overlays lai...
A field-programmable gate array (FPGA) is a type of programmable hardware, where a logic designer mu...
Field-Programmable Gate Arrays (FPGAs) provide an easier path thanApplication-Specific Integrated Ci...
In recent years due to the slow down of Moores Law and Dennard Scaling, alternative architectures ar...
During the last years, the computing performance increased for basically all integrated digital circ...
We present a new type of soft-core processor called the “Data-Flow Soft-Core” that can be implemente...
Coarse-grained FPGA overlays improve design productivity through software-like programmability and f...
We propose a soft processor programmingmodel and architecture inspired by graphics processing units(...
High-level synthesis tools aim to produce hardware designs out of software descriptions with a goal ...
Coarse-grained FPGA overlays have emerged as one possible solution to make FPGAs more accessible to ...
FPGA-based soft processors customized for operations on sparse graphs can deliver significant perfor...
Coarse-grained FPGA overlays built around the runtime programmable DSP blocks in modern FPGAs can ac...
FPGAs can deliver high performance but their programmability wall hinders widespread use: they requi...
Even though it seems that FPGAs have finally made the transition from research labs to the consumer ...
Overlay architectures are programmable logic systems that are compiled on top of a traditional FPGA....
This paper describes a framework supporting the automatic composition of reconfigurable overlays lai...
A field-programmable gate array (FPGA) is a type of programmable hardware, where a logic designer mu...
Field-Programmable Gate Arrays (FPGAs) provide an easier path thanApplication-Specific Integrated Ci...
In recent years due to the slow down of Moores Law and Dennard Scaling, alternative architectures ar...
During the last years, the computing performance increased for basically all integrated digital circ...
We present a new type of soft-core processor called the “Data-Flow Soft-Core” that can be implemente...
Coarse-grained FPGA overlays improve design productivity through software-like programmability and f...
We propose a soft processor programmingmodel and architecture inspired by graphics processing units(...
High-level synthesis tools aim to produce hardware designs out of software descriptions with a goal ...
Coarse-grained FPGA overlays have emerged as one possible solution to make FPGAs more accessible to ...
FPGA-based soft processors customized for operations on sparse graphs can deliver significant perfor...