Merging Datapaths using Data Processing Graphs

During the last years, the computing performance increased for basically all integrated digital circuits, including FPGAs. They contain more configurable logic blocks, more memory, and more dedicated computing resources like DSP blocks. Thus, FPGAs offer a high degree of fine grained parallelism that cannot be reached with classic SIMD processors like GPUs. Furthermore, their power consumption is usually much lower than for GPUs making them suitable for embedded applications. However, this enormous computing power is a trade-off with more complex and demanding development as well as long synthesis times. The first is nowadays targeted by HLS tools that simplify the problem formulation. Instead of VHDL or Verilog code a higher level language like C for example is used. The HLS-compilers turn this again into a hardware description language. Nevertheless, the long synthesis times are still a problem, especially for frequently changing applications. In the CONIRAS project FPGAs were used for continuous runtime verification. Here, the user or tester specifies a set of assertions that the software must fulfill or may not violate. For runtime verification it is essential that the work flow is interactive as assertions change or are specified frequently. To achieve this goal, a set of assertions is transformed from an abstract language into graphs. These are then merged in order to generate a reconfigurable datapath that is adaptable to the current problem within seconds. A comparison showed that this technique outperforms a dynamic partial reconfiguration approach by factors of more than 50x regarding the turnaround times. A second reason to merge graphs prior to generating the datapath is resource reduction. This was evaluated on the example of hardware accelerators that are generated from C-code using PIRANHA, a plugin for the GCC compiler. As the executed software never starts two accelerators in parallel, the resource utilization on the FPGA can be reduced by sharing common resources. It turned out that this problem is more many-layered than the fast reconfiguration. The results that could be achieved using the merging approach did not meet the initial expectations. Therefore, modifications and enhancements were implemented and analyzed in order to get a deeper understanding of the problem. From this knowledge gain new or further modified approaches for the merging are derived in the end