The iDEA DSP Block Based Soft Processor for FPGAs

DSP blocks in modern FPGAs can be used for a wide range of arithmetic functions, offering increased performance, while saving logic resources for other uses. They have evolved to better support a plethora of signal processing tasks, meaning that in other application domains, they may be under-utilised. The DSP48E1 primitives in new Xilinx devices support dynamic programmability, that can help extend their usefulness; the specific function of a DSP block can be modified on a cycle by cycle basis. However, the standard synthesis flow does not leverage this flexibility in the vast majority of cases. The lean DSP Extension Architecture (iDEA) presented in this paper builds around the dynamic programmability of a single DSP48E1 primitive, with minimal additional logic to create a general purpose processor supporting a full instruction-set architecture. The result is a very compact, fast processor that can execute a full gamut of general machine instructions. We show a number of simple applications compiled using a MIPS compiler, and translated to the iDEA instruction set, comparing with a Xilinx MicroBlaze, to show estimated performance figures. Being based on the DSP48E1, this processor can be deployed acros