Data layout transformation for stencil computations on short-vector SIMD architectures

Abstract. Stencil computations are at the core of applications in many domains such as computational electromagnetics, image processing, and partial differen-tial equation solvers used in a variety of scientific and engineering applications. Short-vector SIMD instruction sets such as SSE and VMX provide a promising and widely available avenue for enhancing performance on modern processors. However a fundamental memory stream alignment issue limits achieved perfor-mance with stencil computations on modern short SIMD architectures. In this pa-per, we propose a novel data layout transformation that avoids the stream align-ment conflict, along with a static analysis technique for determining where this transformation is applicable. Significant performance increases are demonstrated for a variety of stencil codes on several modern processors with SIMD capabilities.