Abstract. We introduce MEMORAX, a tool for the verification of control state reachability (i.e., safety properties) of concurrent programs manipulating finite range and integer variables and running on top of weak memory models. The verification task is non-trivial as it involves exploring state spaces of arbitrary or even infinite sizes. Even for programs that only manipulate finite range variables, the sizes of the store buffers could grow unboundedly, and hence the state spaces that need to be explored could be of infinite size. In addition, MEMORAX in-corporates an interpolation based CEGAR loop to make possible the verification of control state reachability for concurrent programs involving integer variables. The reachability procedure...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
Abstract. We present algorithms for checking and enforcing robustness of concurrent programs against...
International audienceCache coherence protocols using self-invalidation and self-downgrade have rece...
Abstract. We introduce MEMORAX, a tool for the verification of control state reachability (i.e., saf...
Modern multiprocessor systems use weak (relaxed) memory models in order to execute memory sharing mu...
Abstract. We address the problem of fence inference in infinite-state concur-rent programs running o...
Abstract—This paper addresses the problem of placing mem-ory fences in a concurrent program running ...
peer reviewedThis paper addresses the problem of verifying and correcting programs when they are mo...
Model-checking tools classicaly verify concurrent programs under the traditional Sequential Consiste...
Abstract. This paper addresses the problem of verifying and correcting programs when they are moved ...
The work covered in this thesis concerns automatic analysis of correctness of parallel programs runn...
Abstract. We investigate the decidability of the state reachability problem in finite-state programs...
For efficiency reasons, most modern processor architectures allow the reordering of CPU instructions...
Modern architectures implement relaxed memory models which may reorder memory operations or execute ...
We present algorithms for checking and enforcing robustness of concurrent programs against the Total...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
Abstract. We present algorithms for checking and enforcing robustness of concurrent programs against...
International audienceCache coherence protocols using self-invalidation and self-downgrade have rece...
Abstract. We introduce MEMORAX, a tool for the verification of control state reachability (i.e., saf...
Modern multiprocessor systems use weak (relaxed) memory models in order to execute memory sharing mu...
Abstract. We address the problem of fence inference in infinite-state concur-rent programs running o...
Abstract—This paper addresses the problem of placing mem-ory fences in a concurrent program running ...
peer reviewedThis paper addresses the problem of verifying and correcting programs when they are mo...
Model-checking tools classicaly verify concurrent programs under the traditional Sequential Consiste...
Abstract. This paper addresses the problem of verifying and correcting programs when they are moved ...
The work covered in this thesis concerns automatic analysis of correctness of parallel programs runn...
Abstract. We investigate the decidability of the state reachability problem in finite-state programs...
For efficiency reasons, most modern processor architectures allow the reordering of CPU instructions...
Modern architectures implement relaxed memory models which may reorder memory operations or execute ...
We present algorithms for checking and enforcing robustness of concurrent programs against the Total...
Modern architectures provide weaker memory consistency guarantees than sequential consistency. These...
Abstract. We present algorithms for checking and enforcing robustness of concurrent programs against...
International audienceCache coherence protocols using self-invalidation and self-downgrade have rece...