Parallel Hardware Designs for Correctly Rounded Elementary Functions", Interval Computations

This paper presents an algorithm for evaluating the functions of reciprocal, square root, 2x, and log2(x) with special purpose hardware. For these func-tions, the algorithm produces correctly rounded results, according to a speci-fied rounding mode. This algorithm can be used to implement directed round-ing which is essential for interval arithmetic, or exact rounding which min-imizes the maximum error of the result. Hardware designs based on this algorithm are discussed. These designs use a polynomial approximation in which the coefficients are originally selected based on the Chebyshev series approximation and are then adjusted to ensure correctly rounded results for all inputs. The terms in the approximation are generated in parallel and are then summed using a high-speed, multi-operand adder. To reduce the number of terms in the approximation, the input interval is partitioned into subinter-vals of equal size and different coefficients are used for each subinterval. Range reduction techniques that maintain correct rounding are presented. Area and delay comparisons are made based on the degree of the polynomial and the accuracy of the final result. For single-precision floating point numbers, the correctly rounded value of the function can be computed in approximately 103 ns on a 70 mm2 chip. Проектирование параллельного аппаратного обеспечения для вычисления корректно округленных элементарных функци