Add to ORKGAbstract. In this article, we present a flexible simulation environment for em-bedded real-time software refinement by a mixed level cosimulation. For this, we combine the native speed of an abstract real-time operating system (RTOS) model in SystemC with dynamic binary translation for fast Instruction Set Sim-ulation (ISS) by QEMU. In order to support stepwise RTOS software refinement from system level to the target software, each task can be separately migrated between the native execution and the ISS. By adapting the dynamic binary trans-lation approach to an efficient but yet very accurate synchronization scheme the overhead of QEMU user mode execution is only factor two compared to native SystemC. Furthermore, the simulation speed incr...
The behaviour of a real-time system can be validated at the system level by means of a real-time ope...
Designing an embedded system implies to look for the right algorithm/architecture compromise dependi...
Parallelizing the development cycles of hardware and software is becoming the industry’s norm for re...
Hardware/Software cosimulation is the key process to shorten the design turn around time. We have pr...
International audienceThe development of embedded systems requires the development of increasingly c...
Executable specifications and simulations are cornerstone to system design flows. Complex mixed sign...
Modern embedded systems increasingly accommodate several applications running concurrently on a mult...
International audienceThe development of embedded systems requires the development of increasingly c...
To fast evaluate HW/SW implementation of multiprocessor SoC communication, we present a method to si...
With increasing complexity and software content, modern embedded platforms employ a heterogeneous mi...
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translatio...
Abstract SystemC is committed to support the requirements for an integrated, HW/SW co-design flow, t...
International audienceHeterogeneous systems simulation requires executing models using different sim...
Nowadays, the increasing system size, despite the need of achieving significant optimizations, requi...
The introduction of transaction level modeling (TLM) allows a system designer to model a complete ap...
The behaviour of a real-time system can be validated at the system level by means of a real-time ope...
Designing an embedded system implies to look for the right algorithm/architecture compromise dependi...
Parallelizing the development cycles of hardware and software is becoming the industry’s norm for re...
Hardware/Software cosimulation is the key process to shorten the design turn around time. We have pr...
International audienceThe development of embedded systems requires the development of increasingly c...
Executable specifications and simulations are cornerstone to system design flows. Complex mixed sign...
Modern embedded systems increasingly accommodate several applications running concurrently on a mult...
International audienceThe development of embedded systems requires the development of increasingly c...
To fast evaluate HW/SW implementation of multiprocessor SoC communication, we present a method to si...
With increasing complexity and software content, modern embedded platforms employ a heterogeneous mi...
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translatio...
Abstract SystemC is committed to support the requirements for an integrated, HW/SW co-design flow, t...
International audienceHeterogeneous systems simulation requires executing models using different sim...
Nowadays, the increasing system size, despite the need of achieving significant optimizations, requi...
The introduction of transaction level modeling (TLM) allows a system designer to model a complete ap...
The behaviour of a real-time system can be validated at the system level by means of a real-time ope...
Designing an embedded system implies to look for the right algorithm/architecture compromise dependi...
Parallelizing the development cycles of hardware and software is becoming the industry’s norm for re...