Cluster-Level Simultaneous Multithreading for VLIW Processors

Clustered VLIW embedded processors have become widespread due to benefits of simple hardware and low power. However, while some applications exhibit large amounts of instruction level parallelism (ILP) and benefit from very wide machines, others have little ILP, which wastes precious re-sources in wide processors. Simultaneous MultiThreading (SMT) is a well known technique that improves resource uti-lization by exploiting thread level parallelism at the instruc-tion grain level. However, implementing SMT for VLIWs re-quires complex structures. In this paper, we propose CSMT (Cluster-level Simultaneous MultiThreading) to allow some degree of SMT in clustered VLIW processors with minimal hardware cost and complexity. CSMT considers the set of op-erations that execute simultaneously in a given cluster (named bundle) as the assignment unit. All bundles belonging to a VLIW instruction from a given thread are issued simultane-ously. To minimize cluster conflicts between threads, a very simple hardware-based cluster renaming mechanism is pro-posed. The experimental results show that CSMT signifi-cantly improves ILP when compared with other multithread-ing approaches suited for VLIW. For instance, with 4 threads CSMT shows an average speedup of 113 % over a single-thread VLIW architecture and 36 % over Interleaved Multi-Threading (IMT). In some cases, speedup can be as high as 228 % over single thread architecture and 97 % over IMT.