Optimal partitioning and balanced scheduling with the maximal overlap of data footprints

The paper proposes a scheme to tolerate the slow memory access latency for loop intensive applications in the system with memory hierarchy. The scheme takes into consideration of both the inter-mediate data and maximal overlap of data footprints for initial data. Furthermore, a schedule is presented to balance the ALU computa-tion and memory operations. The memory requirement under such schedule is calculated. This schedule’s improvement in total exe-cution time is approximately 20 % over existing methods. 1