Algorithms, design

An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We propose a novel imple-mentation of this circuit based on combining the addition chains of the constituent constants. We present an algorithm to automatically generate such a circuit for a given set of constants. The quality of the resulting circuits is evaluated after synthesis for a commercial 0.18m standard cell library. We compare the area and latency efficiency of this addition chain based approach against a straight-forward approach based on a constant table and a full multiplier