Fast and efficient partial code reordering: taking advantage of dynamic recompilation

Poor instruction cache locality can degrade performance on modern architectures. For example, our simulation results show that elim-inating all instruction cache misses improves performance by as much as 16 % for a modestly sized instruction cache. In this pa-per, we show how to take advantage of dynamic code generation in a Java Virtual Machine (VM) to improve instruction locality at run-time. We develop a dynamic code reordering (DCR) system; a low overhead, online approach for improving instruction locality. DCR has three optimizations: (1) Interprocedural method separa-tion; (2) Intraprocedural code splitting; and (3) Code padding. DCR uses the dynamic call graph and an edge profile that most VMs al-ready collect to separate hot/cold methods and hot/cold code within a method. It also puts padding between methods to minimize con-flict misses between frequent caller/callee pairs. It incrementall