Reghizzi. A parallel dynamic compiler for CIL bytecode

Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the potentialities of their hardware parallelism. At the same time, object code virtualization technologies are achieving a growing popularity, as they allow higher levels of software portability and reuse. Thus, a virtual execution environment running on a multi-core proces-sor has to run complex, high-level applications and to exploit as much as possible the underlying parallel hardware. We propose an approach that leverages on CMP features to expose a novel pipeline synchronization model for the internal threads of the dynamic compiler. Thanks to compilation latency masking effect of the pipeline organiza-tion, our dynamic compiler, ILDJIT, is able to achieve significant speedups (26 % on average) with respect to the baseline, when the underlying hard-ware exposes at least two cores.