Supervision:

ii High performance computing, for example as required in the financial sector, is constantly confronted with growing data volumes and an increasing need for fast results. Due to their highly parallel nature and despite their lower clock fre-quencies, field-programmable gate arrays (FPGAs) can outperform conventional CPUs on certain tasks. One such task with significant potential for FPGA acceleration is pattern matching with regular expressions. In this thesis we in-vestigate different techniques for implementing regular expression engines on the FPGA. We begin with the most common application of regular expressions, namely pattern matching in texts, e.g. as can be performed by grep — the popular Unix text search utility. Later we generalize the problem of matching patterns in texts to pattern matching in streams of items that can have arbi-trary data types. As an example application, we employ our regular expression engines to do click stream analysis on a network stream. For specifying such general purpose regular expression engines, we use a declarative language that combines elements from stream processing languages with the widely recognized core syntax of regular expressions. Finally, we have developed a compiler that can translate the aforementioned language into actual circuit specifications, e.g. VHDL code, that can be used to configure an FPGA with the desired pattern matching engine. i