MPreplay: Architecture Support for Deterministic Replay of Message Passing Programs on Message Passing Many-core Processors

While a lot of work has been focused on design and programming of shared memory multi-core architectures, message passing architectures are increasingly being con-sidered an attractive design point for many-core [10] and application-specific [2] processors. A big concern with message passing architectures, however, is programmabil-ity and debuggability on such machines and the signifi-cant overhead of providing support for the same at software level. In this paper, we take a first look at providing hard-ware support for debugging and replay of message passing programs on message passing architectures. We propose a hardware framework for logging races between messages to allow deterministic replay of message passing programs. One implementation of the framework is based on Netzer algorithm [19] for software-based logging and uses vector timestamps. The other implementation is based on a novel algorithm that uses scalar timestamps. We show that the two implementations have small time and space overhead. We discuss similar hardware support for allowing incremental replay of message passing programs.