Extension of a Recognition, Mining and Synthesis Benchmark Suite for Transactional Memory

Transactional Memory (TM) is a new concurrency mechanism that aims to make parallel programming easier, while it promises scalable performance. Recently, several TM designs have been proposed that promise to make TM more efficient. However, most of these systems have been evaluated and analyzed by using microbenchmarks that are not representative of realistic workloads. We believe that the evaluation of TM proposals would be more comprehensive if it included representative benchmarks from the emerging future applications of Recognition, Mining and Synthesis (RMS) domain. In this thesis, we extend the existing RMS-TM benchmark suite with three new applications. RMS applications have often been proposed as good benchmarks for testing new architectures. Moreover, besides being scalable and non-trivial, they present special characteristics, such as memory man-agement operations, complex function calls and I/O operations inside critical sections, that could be challenging for testing TM designs. In order to select the new applications, we followed a well-defined method