Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or a second level with separate instruction and data configurable caches. We instead use a commercially-common unified second level, a seemingly minor difference that actually expands the configuration space from 500 to about 20,000. We develop additive way tuning for tuning a cache subsystem with this large space, yielding 62 % energy savings and 35 % performance improvements over a non-configurable cache, greatly outperforming an extension of a previous method
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent res...
In this paper, we propose several different data and instruction cache configurations and analyze th...
Cache memory is one of the most important components of a computer system. The cache allows quickly...
Memory accesses can account for about half of a microprocessor system’s power consumption. Customizi...
With the advent of mobile and handheld devices, power consumption in embedded systems has become a k...
Conventional microarchitectures choose a single memory hierarchy design point targeted at the averag...
Energy consumption is a major concern in many embedded computing systems. Several studies have shown...
Embedded systems are getting popular in today’s world. They are usually small and thus have a limite...
With each technology generation we get more transistors per chip. Whilst processor frequencies have ...
Managing the energy-performance tradeoff has become a major challenge on embedded systems. The cache...
[[abstract]]Conventional set‐associative caches, with higher associativity, provide lower miss rates...
Optimization techniques are widely used in embedded systems design to improve overall area, performa...
Energy consumption is a major concern in most forms of embedded computing systems. Several studies h...
The instruction cache is a popular target for optimizations of microprocessor-based systems because ...
AN ABSTRACT OF THE THESIS OF Jeffery R. Brewer, for the Master degree in Electrical Computer Enginee...
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent res...
In this paper, we propose several different data and instruction cache configurations and analyze th...
Cache memory is one of the most important components of a computer system. The cache allows quickly...
Memory accesses can account for about half of a microprocessor system’s power consumption. Customizi...
With the advent of mobile and handheld devices, power consumption in embedded systems has become a k...
Conventional microarchitectures choose a single memory hierarchy design point targeted at the averag...
Energy consumption is a major concern in many embedded computing systems. Several studies have shown...
Embedded systems are getting popular in today’s world. They are usually small and thus have a limite...
With each technology generation we get more transistors per chip. Whilst processor frequencies have ...
Managing the energy-performance tradeoff has become a major challenge on embedded systems. The cache...
[[abstract]]Conventional set‐associative caches, with higher associativity, provide lower miss rates...
Optimization techniques are widely used in embedded systems design to improve overall area, performa...
Energy consumption is a major concern in most forms of embedded computing systems. Several studies h...
The instruction cache is a popular target for optimizations of microprocessor-based systems because ...
AN ABSTRACT OF THE THESIS OF Jeffery R. Brewer, for the Master degree in Electrical Computer Enginee...
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent res...
In this paper, we propose several different data and instruction cache configurations and analyze th...
Cache memory is one of the most important components of a computer system. The cache allows quickly...