Design and Implementation of Robust Embedded Processor for Cryptographic Applications

Practical implementations of cryptographic algorithms are vulnerable to side-channel analysis and fault attacks. Thus, some masking and fault detection algorithms must be incor-porated into these implementations. These additions further increase the complexity of the cryptographic devices which already need to perform computationally-intensive opera-tions. Therefore, the general-purpose processors are usually supported by coprocessors/hardware accelerators to protect as well as to accelerate cryptographic applications. Using a configurable processor is just another solution. This work designs and implements robust execution units as an exten-sion to a configurable processor, which detect the data faults (adversarial or otherwise) while performing the arithmetic operations. Assuming a capable adversary who can injects faults to the cryptographic computation with high preci-sion, a nonlinear error detection code with high error detec-tion capability is used. The designed units are tightly inte-grated to the datapath of the configurable processor using its tool chain. For different configurations, we report the in-crease in the space and time complexities of the configurable processor. Also, we present performance evaluations of the software implementations using the robust execution units. Implementation results show that it is feasible to implement robust arithmetic units with relatively low overhead in an embedded processor