A low-noise small signal sensing scheme in voltage mode for high density magnetoresistive memories

Magnetoresistive memory (MRAM) technology which successfully combines integrated circuit and magnetic thin film processes to achieve non-volatile, radiation hard, random access read/write memories, has shown rapid development in the past few years. A considerable amount of research effort is directed towards improving the bit density, which involves the design of denser cells with improved signal levels, and development of suitable sensing schemes. This dissertation presents work done in developing the low noise front end of a multistage small signal sensing scheme, designed for high density MRAMs. The design scheme uses a new sensing mode called \u27voltage mode\u27, instead of \u27current mode\u27 which is presently in use. An analysis of both current mode and voltage mode sensing has been carried out to show that voltage mode has superior performance. This scheme uses self referencing to reduce the memory cell area. All critical deterrant factors that affect this technique have been analyzed and suitable strategies have been developed to minimize their effect. This scheme senses a nominal signal of 0.4 mV in the presence of large voltage offsets which are 100 mV in the worst case. The memory cell area has been reduced to 25 square microns per bit and the read access time is 800 ns