Fabrication of Schottky Barrier MOSFETs on SOI by a Self-Assembly CoSi2-Patterning Method

A new self-assembly patterning method for generation of epitaxial CoSi2 nanostructures was used to fabricate 70 nm gate-length Schottky barrier MOSFETs on SOI substrates. This technique involves only conventional optical lithography and standard silicon processing steps. It is based on anisotropic diffusion of Co/Si atoms in a strain field during rapid thermal processing. The strain field is generated along the edges of a mask consisting of 20 nm SiO2 and 300 mn, Si3N4. During rapid thermal oxinitridation (RTON) of the masked silicide structure, a well-defined separation of the silicide layer forms along the edge of the mask. These highly uniform gaps define the channel region of the fabricated device. The separated silicide layers act as metal source and drain. During the RTON-step a 6 nm thin SiO2 is formed on top of the gap which is used as a gate oxide. The Schottky barrier MOSFETs can be driven as both p-channel and n-channel devices without complementary substrate doping and show good I-V characteristics. (C) 2003 Elsevier Science Ltd. All rights reserved