The influence of HALO implantation on analog device characteristics has been studied and compared for bulk, PD and FD SOI MOSFETs. It has been shown that whereas HALO implantation is needed for base-band applications preferably using longer channel, it has a detrimental effect for high-speed applications using minimum channel length transistors in strong inversion
In this paper, the total ionizing dose (TID) response of a commercial 28-nm high-k CMOS technology a...
Forward body bias has been shown to be an effective way to improve the digital performance of CMOS c...
In this paper, we propose a design of a 0.1 mu m single halo (SH) thin film silicon-on-insulator (SO...
This work presents a systematic comparative study of the influence of various process options on the...
In addition to its attractiveness for ultralow power applications, analog CMOS circuits based on the...
Single halo (SH) and double halo (DH) metal oxide semiconductor field effect transistors (MOSFETs) h...
The effect of Channel Hot Carrier (CHC) stress under typical analog operating conditions is studied ...
This paper investigates the impact of the presence of a HALO implanted region on the lifetime analys...
In this paper, we report anomalous behavior of transconductance(gm) in halo implanted MOSFET for lin...
Halo implants are used in modern CMOS technology to reduce the short channel effect. However, the la...
Single halo p-MOSFETs with channel lengths down to 100 nm are optimized, fabricated, and characteriz...
Halo ion implantation was adopted to reduce the short channel effect (SCE) of a buried channel p-MOS...
This paper investigates the relationship between various HALO parameters best suited to achieve shor...
In this paper, with the help of simulations the concepts of source/drain (S/D) impurity profile engi...
Channel engineering of SOI MOSFETs is explored by altering ion implantation without adding any new f...
In this paper, the total ionizing dose (TID) response of a commercial 28-nm high-k CMOS technology a...
Forward body bias has been shown to be an effective way to improve the digital performance of CMOS c...
In this paper, we propose a design of a 0.1 mu m single halo (SH) thin film silicon-on-insulator (SO...
This work presents a systematic comparative study of the influence of various process options on the...
In addition to its attractiveness for ultralow power applications, analog CMOS circuits based on the...
Single halo (SH) and double halo (DH) metal oxide semiconductor field effect transistors (MOSFETs) h...
The effect of Channel Hot Carrier (CHC) stress under typical analog operating conditions is studied ...
This paper investigates the impact of the presence of a HALO implanted region on the lifetime analys...
In this paper, we report anomalous behavior of transconductance(gm) in halo implanted MOSFET for lin...
Halo implants are used in modern CMOS technology to reduce the short channel effect. However, the la...
Single halo p-MOSFETs with channel lengths down to 100 nm are optimized, fabricated, and characteriz...
Halo ion implantation was adopted to reduce the short channel effect (SCE) of a buried channel p-MOS...
This paper investigates the relationship between various HALO parameters best suited to achieve shor...
In this paper, with the help of simulations the concepts of source/drain (S/D) impurity profile engi...
Channel engineering of SOI MOSFETs is explored by altering ion implantation without adding any new f...
In this paper, the total ionizing dose (TID) response of a commercial 28-nm high-k CMOS technology a...
Forward body bias has been shown to be an effective way to improve the digital performance of CMOS c...
In this paper, we propose a design of a 0.1 mu m single halo (SH) thin film silicon-on-insulator (SO...