A switched-current sensing architecture for a four-state per cell magnetic tunnel junction MRAM

A current-mode binary-search sensing scheme for a four-state per cell one-transistor one-magnetic tunnel junction magneto-resistive (MR) random access memory is proposed. By using the switched-current technique, it is able to read data non-destructively with a MR ratio as low as 5\%. The sensing circuit is designed using a 0.18-mum CMOS process and the performance is verified by HSPICE simulation. At a supply voltage of 1.8 V, the data can be accessed in 17.5 ns with a power consumption of 475.9 muW. Compared to the parallel sensing approach, the proposed sensing scheme consumes less power and chip area, and requires fewer comparison steps. Compared to the conventional serial sensing approach, it allows a shorter read access time while performing the same number of comparisons