The Design and Realization of Basic nMOS Digital Devices

Our study involves the design, fabrication, and characterization of basic nMOS digital logic gates, including basic inverter, NAND, and NOR devices on four-inch silicon wafers. Beginning with the fundamental device design rules, our study progresses into mask design and fabrication; semiconductor processing techniques, including wet and dry oxidation processes, positive and negative photolithography, selective diffusion of dopant (phosphorus) impurities, and metal (aluminum) deposition; and device characterization methods. The results of our study will include discussions of the following: 1) basic semiconductor device design and processing procedures using our laboratory facilities within the Department of Electrical and Computer Engineering at the Virginia Military Institute; 2) n-channel enhancement MOSFET (nMOS) technology, including device structure, design layout, fabrication procedures, and device characteristics (I-V and transfer characteristics); 3) nMOS digital device technology, including basic logic gate design options, and device operation; and 4) an evaluation of the performance characteristics of the basic digital logic devices that are fabricated in our laboratory. As these basic logic gates are the fundamental building blocks used in digital circuit design, a thorough understanding of their design and realization is essential before more complex circuits are attempted