Body resistance Harmonic balance a b s t r a c t This paper reports recent progress in partially depleted (PD) SOI MOSFET modeling using a surface poten-tial based approach. The new model is formulated within the framework of the latest industry standard bulk MOSFET model PSP. In addition to its physics-based formulation and scalability inherited from PSP, PSP-SOI captures SOI specific effects by including floating body simulation capability, parasitic body cur-rents and capacitances. A nonlinear body resistance model is included for accurate characterization and simulation of body-contacted SOI devices. The PSP-SOI model has been verified using test data from 90 nm to 65 nm PD/SOI processes. 2008 Elsevier Ltd. All rights reserved
Recently, there has been a growing interest in using SOI MOSFET as the device dimension shrinks to n...
Bulk CMOS is currently the dominant technology for VLSI integrated circuits but its scaling constrai...
With the continuous scaling of CMOS technologies, Silicon-on-Insulator (SOI) technologies have becom...
Abstract — This paper reports recent progress on partially depleted (PD) SOI modeling using a surfac...
This paper describes a unified framework to model the floating-body effects of various SOI MOSFET op...
In this paper, a nonlinear model for the body resistance of a 45nm PD SOI MOSFET is developed. This ...
Body-contacts (BC) partially depleted (PD) silicon-on-insulator (SOI) MOSFETs suffer from a loss of ...
A new analytical model for SOI MOSFET with floating-body-effect(FBE) is developed to described the S...
Silicon-On-Insulator (SOI) technology, which was originally developed for military applications, is ...
This letter provides a viewpoint for the characterization of state-of-the-art thin film silicon-on-i...
A compact terminal current/charge model for partially/dynamically/fully depleted (PD)/(DD)/(FD) doub...
Investigations of floating body behaviour of partially depleted (PD) SOI MOSFETs have established th...
The small signal characteristics in the frequency domain are investigated to quantify the impact of ...
An accurate submicrometer MOSFET device model for Silicon-On-Insulator (SOI) technology suitable for...
In this paper, the Southampton Thermal Analogue (STAG) compact model for partially depleted (PD) sil...
Recently, there has been a growing interest in using SOI MOSFET as the device dimension shrinks to n...
Bulk CMOS is currently the dominant technology for VLSI integrated circuits but its scaling constrai...
With the continuous scaling of CMOS technologies, Silicon-on-Insulator (SOI) technologies have becom...
Abstract — This paper reports recent progress on partially depleted (PD) SOI modeling using a surfac...
This paper describes a unified framework to model the floating-body effects of various SOI MOSFET op...
In this paper, a nonlinear model for the body resistance of a 45nm PD SOI MOSFET is developed. This ...
Body-contacts (BC) partially depleted (PD) silicon-on-insulator (SOI) MOSFETs suffer from a loss of ...
A new analytical model for SOI MOSFET with floating-body-effect(FBE) is developed to described the S...
Silicon-On-Insulator (SOI) technology, which was originally developed for military applications, is ...
This letter provides a viewpoint for the characterization of state-of-the-art thin film silicon-on-i...
A compact terminal current/charge model for partially/dynamically/fully depleted (PD)/(DD)/(FD) doub...
Investigations of floating body behaviour of partially depleted (PD) SOI MOSFETs have established th...
The small signal characteristics in the frequency domain are investigated to quantify the impact of ...
An accurate submicrometer MOSFET device model for Silicon-On-Insulator (SOI) technology suitable for...
In this paper, the Southampton Thermal Analogue (STAG) compact model for partially depleted (PD) sil...
Recently, there has been a growing interest in using SOI MOSFET as the device dimension shrinks to n...
Bulk CMOS is currently the dominant technology for VLSI integrated circuits but its scaling constrai...
With the continuous scaling of CMOS technologies, Silicon-on-Insulator (SOI) technologies have becom...